- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11138 > EFM32G232F128 (Energy Micro)IC MCU 32BIT 128KB FLASH 64LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | EFM32G232F128 |
| 廠商： | Energy Micro |
| 文件頁(yè)數(shù)： | 130/136頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MCU 32BIT 128KB FLASH 64LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Gecko |
| 核心處理器： | ARM? Cortex?-M3 |
| 芯體尺寸： | 32-位 |
| 速度： | 32MHz |
| 連通性： | I²C，IrDA，智能卡，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，DMA，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 53 |
| 程序存儲(chǔ)器容量： | 128KB（128K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 16K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.8 V ~ 3.8 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 1x12b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 64-TQFP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | 914-1026-6 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)當(dāng)前第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
93
www.energymicro.com
byte offset 2 refers to register bits[23:16]
byte offset 3 refers to register bits[31:24].
4.2.8 Software Trigger Interrupt Register
Write to the STIR to generate a Software Generated Interrupt (SGI). See the register summary in
Table 4.2 (p. 88) for the STIR attributes.
When the USERSETMPEND bit in the SCR is set to 1, unprivileged software can access the STIR, see
Note
Only privileged software can enable unprivileged access to the STIR.
The bit assignments are:
9
31
0
Reserved
INTID
8
Table 4.10. STIR bit assignments
Bits
Field
Function
[31:9]
-
Reserved.
[8:0]
INTID
Interrupt ID of the required SGI, in the range 0 to (n-1), where n denotes the number of interrupts given
by Table 1.1 (p. 5) . For example, a value of b000000011 specifies interrupt IRQ3.
4.2.9 Level-sensitive interrupts
All interrupt lines in the EFM32 devices are level sensitive interrupts. A level-sensitive interrupt is held
asserted until the peripheral deasserts the interrupt signal. Typically this happens because the ISR
accesses the peripheral, causing it to clear the interrupt request.
When the processor enters the ISR, it automatically removes the pending state from the interrupt, see
Section 4.2.9.1 (p. 93) . If the signal is not deasserted before the processor returns from the ISR, the
interrupt becomes pending again, and the processor must execute its ISR again. This means that the
peripheral can hold the interrupt signal asserted until it no longer needs servicing.
4.2.9.1 Hardware and software control of interrupts
The Cortex-M3 latches all interrupts. A peripheral interrupt becomes pending for one of the following
reasons:
the NVIC detects that the interrupt signal is HIGH and the interrupt is not active
the NVIC detects a rising edge on the interrupt signal
software writes to the corresponding interrupt set-pending register bit, see Section 4.2.4 (p. 90) ,
or to the STIR to make an SGI pending, see Section 4.2.8 (p. 93) .
A pending interrupt remains pending until one of the following:
The processor enters the ISR for the interrupt. This changes the state of the interrupt from pending
to active. Then:
When the processor returns from the ISR, the NVIC samples the interrupt signal. If the signal
is asserted, the state of the interrupt changes to pending, which might cause the processor to
immediately re-enter the ISR. Otherwise, the state of the interrupt changes to inactive.
Software writes to the corresponding interrupt clear-pending register bit.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-B1B-IY-F2 | CONVERTER MOD DC/DC 95V 50W |
| MAX392ESE+T | IC SWITCH QUAD SPST 16SOIC |
| VI-B1B-IY-F1 | CONVERTER MOD DC/DC 95V 50W |
| MAX392CUE+T | IC SWITCH QUAD SPST 16TSSOP |
| VI-2WZ-IY-F3 | CONVERTER MOD DC/DC 2V 20W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EFM32G232F128G-E-QFP64R | 功能描述:128K FLASH, 16K RAM, AES 制造商:silicon labs 系列:Gecko 包裝:剪切帶（CT） 零件狀態(tài):在售 核心處理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:32MHz 連接性:I2C，IrDA，智能卡，SPI，UART/USART 外設(shè):欠壓檢測(cè)/復(fù)位，DMA，POR，PWM，WDT I/O 數(shù):53 程序存儲(chǔ)容量:128KB（128K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 容量:- RAM 容量:16K x 8 電壓 - 電源（Vcc/Vdd）:1.98 V ~ 3.8 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x12b，D/A 1x12b 振蕩器類型:內(nèi)部 工作溫度:-40°C ~ 85°C（TA） 封裝/外殼:64-TQFP 供應(yīng)商器件封裝:64-TQFP（10x10） 標(biāo)準(zhǔn)包裝:1 |
| EFM32G232F128-QFP64 | 制造商:Energy Micro AS 功能描述:GECKO MCU - Tape and Reel 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 128KB FLASH 64TQFP |
| EFM32G232F128-QFP64T | 制造商:Energy Micro AS 功能描述:32 BIT ARM MPU, GECKO - Trays |
| EFM32G232F128-QFP64-T | 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 128KB FLASH 64TQFP |
| EFM32G232F128-T | 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 128KB FLASH 64TQFP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。