參數(shù)資料
型號(hào): EFM32G232F128
廠商: Energy Micro
文件頁數(shù): 100/136頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝: 1
系列: Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 1x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1026-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
66
www.energymicro.com
3.5.9.2 Operation
These instructions test the value in a register against Operand2. They update the condition flags based
on the result, but do not write the result to a register.
The TST instruction performs a bitwise AND operation on the value in Rn and the value of Operand2.
This is the same as the ANDS instruction, except that it discards the result.
To test whether a bit of Rn is 0 or 1, use the TST instruction with an Operand2 constant that has that
bit set to 1 and all other bits cleared to 0.
The TEQ instruction performs a bitwise Exclusive OR operation on the value in Rn and the value of
Operand2
. This is the same as the EORS instruction, except that it discards the result.
Use the TEQ instruction to test if two values are equal without affecting the V or C flags.
TEQ
is also useful for testing the sign of a value. After the comparison, the N flag is the logical Exclusive
OR of the sign bits of the two operands.
3.5.9.3 Restrictions
Do not use SP and do not use PC.
3.5.9.4 Condition flags
These instructions:
update the N and Z flags according to the result
can update the C flag during the calculation of Operand2, see Section 3.3.3 (p. 38)
do not affect the V flag.
3.5.9.5 Examples
TST
R0, #0x3F8
; Perform bitwise AND of R0 value to 0x3F8,
; APSR is updated but result is discarded
TEQEQ
R10, R9
; Conditionally test if value in R10 is equal to
; value in R9, APSR is updated but result is discarded
3.6 Multiply and divide instructions
Table 3.9 (p. 66) shows the multiply and divide instructions:
Table 3.9. Multiply and divide instructions
Mnemonic
Brief description
See
MLA
Multiply with Accumulate, 32-bit result
MLS
Multiply and Subtract, 32-bit result
MUL
Multiply, 32-bit result
SDIV
Signed Divide
SMLAL
Signed Multiply with Accumulate
(32x32+64), 64-bit result
SMULL
Signed Multiply (32x32), 64-bit result
UDIV
Unsigned Divide
UMLAL
Unsigned Multiply with Accumulate
(32x32+64), 64-bit result
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