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參數(shù)資料
| 型號： | EDL1216CASA-10 |
| 英文描述： | Programmable VCOM; Temperature Range: -40°C to 85°C; Package: 24-QFN |
| 中文描述： | 內存| 4X2MX16 |的CMOS | BGA封裝| 54PIN |塑料 |
| 文件頁數(shù)： | 19/59頁 |
| 文件大小： | 489K |
| 代理商： | EDL1216CASA-10 |
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EDL1216AASA
Data Sheet E0196E20 (Ver. 2.0)
26
Auto Precharge
During a read or write command cycle, A10 controls whether auto precharge is selected. A10 high in the Read or
Write command (Read with Auto precharge command or Write with Auto precharge command), auto precharge is
selected and begins automatically. The tRAS must be satisfied with a read with auto precharge or a write with auto
precharge operation. In addition, the next activate command to the bank being precharged cannot be executed until
the precharge cycle ends.
In read cycle, once auto precharge has started, an activate command to the bank can be issued after tRP has been
satisfied.
In write cycle, the tDAL must be satisfied to issue the next activate command to the bank being precharged.
The timing that begins the auto precharge cycle depends on whether read or write cycle.
Read with Auto Precharge
During a read cycle, the auto precharge begins one clock earlier (/CAS latency of 2) or two clocks earlier (/CAS
latency of 3) the last data word output.
QB1
QB2
QB3
QB4
Auto precharge starts
READA B
Hi-Z
QB1
QB2
QB3
QB4
Auto precharge starts
READA B
Hi-Z
DQ
Command
DQ
Command
/CAS latency = 2
/CAS latency = 3
CLK
T0
T2
T1
T3
T4
T5
T6
T7
T8
Burst length = 4
(tRAS must be satisfied)
T9
Read with Auto Precharge
Remark: READA means Read with Auto precharge
Write with Auto Precharge
During a write cycle, the auto precharge starts at the timing that is equal to the value of the tDPL (min.) after the
last data word input to the device.
DB1
DB2
DB3
DB4
Auto precharge starts
WRITA B
Hi-Z
DQ
Command
CLK
T0
T2
T1
T3
T4
T5
T6
T7
T8
Burst length = 4
(tRAS must be satisfied)
tDPL(MIN.)
Write with Auto Precharge
Remark: WRITA means Write with Auto Precharge
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