參數(shù)資料
型號: DS89C21TMX
元件分類: 收發(fā)器
英文描述: Transceiver
中文描述: 收發(fā)器
文件頁數(shù): 5/48頁
文件大小: 934K
代理商: DS89C21TMX
DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers
5 of 48
AC CHARACTERISTICS (continued)
(V
CC
= 4.5V to 5.5V, T
O
= -40°C to +85°C.) (See
Figure 1
,
Figure 2
, and
Figure 3
.)
1-CYCLE
PAGE MODE 1
2-CYCLE
PAGE MODE 1
4-CYCLE
PAGE MODE 1
PAGE MODE 2
NONPAGE MODE
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
PSEN
Low to Valid Instruction
In
t
PLIV
t
CLCL
- 20
t
CLCL
- 20
2t
CLCL
- 20
t
CLCL
- 20
2t
CLCL
- 20
ns
Input Instruction Hold After
PSEN
t
PXIX
0
0
0
0
0
ns
Input Instruction Float After
PSEN
t
PXIZ
t
CLCL
- 5
t
CLCL
- 5
ns
Port 0 Address to Valid
Instruction In
t
AVIV0
1.5t
CLCL
- 22
3t
CLCL
- 22
ns
Port 2 Address to Valid
Instruction In
t
AVIV2
t
CLCL
- 20
1.5t
CLCL
- 20
2.5t
CLCL
- 20
3t
CLCL
- 20
3.5t
CLCL
- 20
ns
PSEN
Low to Port 0 Address
Float
t
PLAZ
0
0
ns
RD
Pulse Width (P3.7)
(Note 16)
t
RLRH
t
CLCL
- 5
+ t
STC1
t
CLCL
- 5
+ t
STC1
2t
CLCL
- 5
+ t
STC1
2t
CLCL
- 5
+ t
STC1
2t
CLCL
- 5
+ t
STC1
ns
WR
Pulse Width (P3.6)
(Note 16)
t
WLWH
t
CLCL
- 5
+ t
STC1
t
CLCL
- 5
+ t
STC1
2t
CLCL
- 5
+ t
STC1
2t
CLCL
- 5
+ t
STC1
2t
CLCL
- 5
+ t
STC1
ns
RD
(P3.7) Low to Valid Data In
(Note 16)
t
RLDV
t
CLCL
- 18
+ t
STC1
t
CLCL
- 18
+ t
STC1
2t
CLCL
- 18
+ t
STC1
2t
CLCL
- 18
+ t
STC1
2t
CLCL
- 18
+ t
STC1
ns
Data Hold After
RD
(P3.7)
t
RHDX
0
0
0
0
0
ns
Data Float After
RD
(P3.7)
t
RHDZ
t
CLCL
- 5
t
CLCL
- 5
ns
MOVX ALE Low to Input Data
Valid (Note 16)
t
LLDV
2t
CLCL
- 8
+ t
STC1
2t
CLCL
- 5
+ t
STC1
ns
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