參數(shù)資料
型號(hào)： DS32508N#
廠商： Maxim Integrated Products
文件頁數(shù)： 118/130頁
文件大?。?/td> 0K
描述： IC LIU DS3/E3/STS-1 484-BGA
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 60
類型： 線路接口裝置（LIU）
規(guī)程： IEEE 1149.1
電源電壓： 1.8V, 3.3V
安裝類型： 表面貼裝
封裝/外殼： 484-BGA
供應(yīng)商設(shè)備封裝： 484-BGA（23x23）
包裝： 管件
DS32506/DS32508/DS32512
88 of 130
Register Name:
BERT.SR
Register Description:
BERT Status Register
Register Address:
n * 80h + 5Ch
Bit #
15
14
13
12
11
10
9
8
Name
—
Default
0
Bit #
7
6
5
4
3
2
1
0
Name
—
PMS
—
BEC
OOS
Default
0
1
0
Bit 3: Performance Monitoring Update Status (PMS).
This bit is set when the performance monitoring registers
(BERT.RBCR and BERT.RBECR) have been updated. PMS is asynchronously forced low when the
BERT.CR:LPMU bit (BERT.CR:PMUM = 0) or RPMU signal (BERT.CR:PMUM = 1) goes low. See Section 8.7.4.
0 = The associated update request signal is low or not all register updates are completed
1 = The requested performance register updates are all completed
Bit 1: Bit Error Count (BEC).
See Section 8.5.1.
0 = the bit error count is zero
1 = the bit error count is one or more
Bit 0: Out of Synchronization (OOS).
See Section 8.5.1.
0 = the receive pattern generator is synchronized to the incoming pattern
1 = the receive pattern generator is not synchronized to the incoming pattern
Register Name:
BERT.SRL
Register Description:
BERT Status Register Latched
Register Address:
n * 80h + 5Eh
Bit #
15
14
13
12
11
10
9
8
Name
—
Default
0
Bit #
7
6
5
4
3
2
1
0
Name
—
PMSL
BEL
BECL
OOSL
Default
0
Bit 3: Performance Monitoring Update Status Latched (PMSL).
This bit is set when the BERT.SR:PMS bit
transitions from zero to one. When set, this bit causes an interrupt if interrupt enables BERT.SRIE:PMSIE,
Bit 2: Bit Error Latched (BEL).
This bit is set when a bit error is detected in the received pattern. When set, this
bit causes an interrupt if interrupt enables BERT.SRIE:BEIE, PORT.ISRIE:BSRIE and GLOBAL.ISRIE:PnISRIE are
all set.
Bit 1: Bit Error Count Latched (BECL).
This bit is set when the BERT.SR:BEC bit transitions from zero to one.
When set, this bit causes an interrupt if interrupt enables BERT.SRIE:BECIE, PORT.ISRIE:BSRIE and
GLOBAL.ISRIE:PnISRIE are all set.
Bit 0: Out of Synchronization Latched (OOSL).
This bit is set when the BERT.SR:OOS bit changes state. When
set, this bit causes an interrupt if interrupt enables BERT.SRIE:OOSIE, PORT.ISRIE:BSRIE and
GLOBAL.ISRIE:PnISRIE are all set.
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參數(shù)描述
DS32508N# 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 8-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS32508N+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 8-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS32508NA2 制造商:Maxim Integrated Products 功能描述:DS32508NA2 X8 DS3/E3 LIU - Rail/Tube
DS32508N-W 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS32508-W 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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