參數(shù)資料
型號: DS2760AX
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PBGA14
封裝: FLIPCHIP-14
文件頁數(shù): 7/25頁
文件大?。?/td> 289K
代理商: DS2760AX
DS2760
15
1-WIRE CRC GENERATION BLOCK DIAGRAM Figure 14
HARDWARE CONFIGURATION
Because the 1-Wire bus has only a single line, it is important that each device on the bus be able to drive
it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must connect to the
bus with open-drain or tri-state output drivers. The DS2760 used an open-drain output driver as part of
the bidirectional interface circuitry shown in Figure 15. If a bidirectional pin is not available on the bus
master, separate output and input pins can be tied together.
The 1-Wire bus must have a pull-up resistor at the bus-master end of the bus. For short line lengths, the
value of this resistor should be approximately 5k
W. The idle state for the 1-Wire bus is high. If, for any
reason, a bus transaction must be suspended, the bus MUST be left in the idle state in order to properly
resume the transaction later. If the bus is left low for more than 120ms, slave devices on the bus begin to
interpret the low period as a Reset Pulse, effectively terminating the transaction.
1-WIRE BUS INTERFACE CIRCUITRY Figure 15
TRANSACTION SEQUENCE
The protocol for accessing the DS2760 via the 1-Wire port is as follows:
§ Initialization
§ Net Address Command
§ Function Command
§ Transaction/Data
The sections that follow describe each of these steps in detail.
1
mA
Typ.
100
W
MOSFET
Tx
Rx
Tx
Rx = Receive
Tx = Transmit
+VPULLUP (2.0V–5.5V)
4.7k
W
BUS MASTER
DS2760 1-WIRE PORT
MSb
XOR
LSb
XOR
input
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