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DS26528 Octal T1/E1/J1 Transceiver
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Table 12-3. Transmit AC Characteristics
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
(Note 2)
648
TCLK Period
tCP
(Note 3)
488
ns
tCH
125
TCLK Pulse Width
tCL
125
ns
(Note 4)
60
648
TSYSCLK Period
tSP
(Note 5)
60
448
ns
tSH
30
TSYSCLK Pulse Width
tSL
30
ns
TSYNC or TSSYNCIO Setup to TCLK
or TSYSCLK falling
tSU
20
tCH - 5
or
tSH - 5
ns
TSYNC or TSSYNCIO Pulse Width
tPW
(Note 6)
50
ns
488
244
122
TSSYNCIO Pulse Width (Notes 7, 8)
tPW
61
ns
TSER, TSIG Setup to TCLK,
TSYSCLK Falling
tSU
20
ns
TSER, TSIG Hold from TCLK,
TSYSCLK Falling
tHD
20
ns
Delay TCLK to TCHBLK, TCHCLK,
TSYNC
tD2
50
ns
Delay TSYSCLK to TCHCLK, TCHBLK
tD3
50
ns
Delay TCLK to TTIP, TRING
tD4
50
ns
Delay BPCLK to TSSYNCIO (Note 7)
tD5
5
ns
Note 1:
The timing parameters in this table are guaranteed by design (GBD).
Note 2:
T1 Mode.
Note 3:
E1 Mode.
Note 4:
RSYSCLK = 1.544MHz.
Note 5:
RSYSCLK = 2.048MHz.
Note 6:
TSSYNCIO configured as an input (
GTCR2.1 = 0).
Note 7:
TSSYNCIO configured as an output (
GTCR2.1 = 1).
Note 8:
Varies depending on the frequency of BPCLK.