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參數(shù)資料
| 型號(hào)： | DS2415X |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Timer or RTC |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, X6 |
| 封裝： | CHIP SCALE |
| 文件頁(yè)數(shù)： | 2/14頁(yè) |
| 文件大?。?/td> | 343K |
| 代理商： | DS2415X |
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DS2415
10 of 14
1-WIRE SIGNALING
The DS2415 requires strict protocols to insure data integrity. The protocol consists of four types of
signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1 and Read
Data. All these signals except Presence Pulse are initiated by the bus master. The initialization sequence
required to begin any communication with the DS2415 is shown in Figure 8. A Reset Pulse followed by a
Presence Pulse indicates the DS2415 is ready to send or receive data given the correct ROM command
and control function command. The bus master transmits (TX) a Reset Pulse (tRSTL , minimum 480
s).
The bus master then releases the line and goes into receive mode (RX). The 1-Wire bus is pulled to a high
state via the pullup resistor. After detecting the rising edge on the data line, the DS2415 waits (tPDH, 15-60
s) and then transmits the Presence Pulse (t
PDL , 60-240
s).
INITIALIZATION PROCEDURE “RESET AND PRESENCE PLUSES” Figure 8
480
s ≤ t
RSTL <
∞ *
480
s ≤ t
RSTH <
∞ ( INCLUDES RECOVERY TIME)
15
s ≤ t
PDH < 60
s
60
s ≤ t
PDL < 240
s
In order not to mask interrupt signaling by other devices on the 1-Wire bus, t
RSTL + tR should always
be less than 960
s.
READ/WRITE TIME SLOTS
The definitions of write and read time slots are illustrated in Figure 9. All time slots are initiated by the
master driving the data line low. The falling edge of the data line synchronizes the DS2415 to the master
by triggering a delay circuit in the DS2415. During write time slots, the delay circuit determines when the
DS2415 will sample the data line. For a read data time slot, if a 0 is to be transmitted, the delay circuit
determines how long the DS2415 will hold the data line low overriding the 1 generated by the master. If
the data bit is a 1, the device will leave the read data time slot unchanged.
RESISTOR
MASTER
DS2415
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2417X | 0 TIMER(S), REAL TIME CLOCK, PBGA6 |
| DS2417P | 0 TIMER(S), REAL TIME CLOCK, PDSO6 |
| DS2422X | SPECIALTY MEMORY CIRCUIT, UUC |
| DS2423P/T&R | SPECIALTY MEMORY CIRCUIT, PDSO6 |
| DS2423P | SPECIALTY MEMORY CIRCUIT, PDSO6 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2416FP00K | 制造商:Thomas & Betts 功能描述:200A,CON,3P4W,MG,416,3P208V,CC |
| DS2416FR000 | 制造商:Thomas & Betts 功能描述:200A,REC,3P4W,MG,416,3P208V,SC |
| DS2416FRAB0 | 制造商:Thomas & Betts 功能描述:200A,REC.,3P4W,3PHASE,208V |
| DS2416MP000 | 制造商:Thomas & Betts 功能描述:DS2416MP000 200A,PLG,3P4W,MG,416 制造商:Thomas & Betts 功能描述:200A,PLG,3P4W,MG,416,3P208V |
| DS2416MP00K | 制造商:Thomas & Betts 功能描述:200A,PLG,3P4W,MG,416,3P208V,CC |
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