參數(shù)資料
型號(hào): DS21Q50LN+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 43/87頁(yè)
文件大?。?/td> 0K
描述: IC TXRX E1 QUAD 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 90
功能: 收發(fā)器
接口: E1
電路數(shù): 4
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 230mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
包括: AIS 警報(bào)檢測(cè)器和發(fā)生器,回送功能,PRBS 發(fā)生器 / 檢測(cè)器,遠(yuǎn)程檢測(cè)器和發(fā)生器
DS21Q50
48 of 87
11.
IDLE CODE INSERTION
The transmit idle registers (TIR1/2/3/4) determine which of the 32 E1 channels should be overwritten
with the code placed in the transmit idle-definition register (TIDR). This allows the same 8-bit code to be
placed into any of the 32 E1 channels.
Each of the bit positions in the TIRs represents a DS0 channel in the outgoing frame. When these bits are
set to 1, the corresponding channel transmits the idle code contained in the TIDR.
Register Name:
TIR1, TIR2, TIR3, TIR4
Register Description:
Transmit Idle Registers
Register Address:
24 Hex, 25 Hex, 26 Hex, 27 Hex
Bit
7
6
5
4
3
2
1
0
Name
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
Name
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
Name
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
Name
CH32
CH31
CH30
CH29
CH28
CH27
CH26
CH25
NAME
BIT
FUNCTION
CH1 to CH32
TIR1.0 to 4.7
Transmit Idle Code-Insertion Control Bits
0 = do not insert the idle code in the TIDR into this channel
1 = insert the idle code in the TIDR into this channel
Register Name:
TIDR
Register Description:
Transmit Idle Definition Register
Register Address:
23 Hex
Bit
7
6
5
4
3
2
1
0
Name
TIDR7
TIDR6
TIDR5
TIDR4
TIDR3
TIDR2
TIDR1
TIDR0
NAME
BIT
FUNCTION
TIDR7
7
MSB of the idle code (this bit is transmitted first)
TIDR6
6
TIDR5
5
TIDR4
4
TIDR3
3
TIDR2
2
TIDR1
1
TIDR0
0
LSB of the idle code (this bit is transmitted last)
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