參數(shù)資料
型號: DS21FF42
廠商: Maxim Integrated Products
文件頁數(shù): 70/114頁
文件大?。?/td> 0K
描述: IC FRAMER T1 4X4 16CH 300-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 40
控制器類型: T1 調(diào)幀器
接口: 并行/串行
電源電壓: 2.97 V ~ 3.63 V
電流 - 電源: 300mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 300-BBGA
供應(yīng)商設(shè)備封裝: 300-PBGA(27x27)
包裝: 管件
DS21FT42/DS21FF42
59 of 114
TC1 TO TC24: TRANSMIT CHANNEL REGISTERS
(Address=40 to 4F and 50 to 57 Hex)
(for brevity, only channel one is shown; see Table 8-1 for other register address)
(MSB)
(LSB)
C7
C6
C5
C4
C3
C2
C1
C0
TC1 (50)
SYMBOL
POSITION
NAME AND DESCRIPTION
C7
TC1.7
MSB of the Code (this bit is transmitted first)
C0
TC1.0
LSB of the Code (this bit is transmitted last)
TCC1/TCC2/TCC3: TRANSMIT CHANNEL CONTROL REGISTER
(Address=16 to 18 Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
TCC1 (16)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
TCC2 (17)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
TCC3 (18)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH1 - 24
TCC1.0 - 3.7
Transmit Code Insertion Control Bits
0 = do not insert data from the TC register into the transmit
data stream
1 = insert data from the TC register into the transmit data
stream
15.2 RECEIVE SIDE CODE GENERATION
In the receive direction there are also two methods by which channel data to the backplane can be
overwritten with data generated by the framer. The first method which is covered in Section 15.2.1 was a
feature contained in the original DS21Q41 while the second method which is covered in Section 15.2.2 is
a new feature of the DS21Q42.
15.2.1
Simple Code Insertion
The first method on the receive side involves using the Receive Mark Registers (RMR1/2/3) to determine
which of the 24 T1 channels should be overwritten with either a 7Fh idle code or with a digital milliwatt
pattern. The RCR2.7 bit will determine which code is used. The digital milliwatt code is an 8 byte
repeating pattern that represents a 1 kHz sine wave (1E/0B/0B/1E/9E/8B/8B/9E). Each bit in the RMRs,
represents a particular channel. If a bit is set to a one, then the receive data in that channel will be
replaced with one of the two codes. If a bit is set to zero, no replacement occurs.
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