參數(shù)資料
型號： DS2152L+
廠商： Maxim Integrated Products
文件頁數(shù)： 6/97頁
文件大?。?/td> 0K
描述： IC TXRX T1 1CHIP ENHNCD 100-LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 90
功能： 單芯片收發(fā)器
接口： T1
電路數(shù)： 1
電源電壓： 4.75 V ~ 5.25 V
電流 - 電源： 75mA
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 管件
包括： DSX-1 和 CSU 線路補(bǔ)償發(fā)生器，HDLC 控制器，帶內(nèi)回路代碼發(fā)生器和檢測器
產(chǎn)品目錄頁面： 1429 (CN2011-ZH PDF)
DS2152
14 of 97
2.4 Line Interface Pins
PIN
NAME
FUNCTION
21
MCLK
Master Clock Input. A 1.544MHz (±50ppm) clock source with TTL levels is applied at
this pin. This clock is used internally for both clock/data recovery and for jitter
attenuation. A quartz crystal of 1.544MHz may be applied across MCLK and XTALD
instead of the TTL level clock source.
22
XTALD
Quartz Crystal Driver. A quartz crystal of 1.544MHz may be applied across MCLK
and XTALD instead of a TTL level clock source at MCLK. Leave open circuited if a
TTL clock source is applied at MCLK.
13
8XCLK
Eight Times Clock. A 12.352MHz clock that is frequency locked to the 1.544MHz
clock provided from the clock/data recovery block (if the jitter attenuator is enabled on
the receive side) or from the TCLKI pin (if the jitter attenuator is enabled on the transmit
side). Can be internally disabled via the TEST2 register if not needed.
12
LIUC
Line Interface Connect. Tie low to separate the line interface circuitry from the
framer/formatter circuitry and activate the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/
RCLKI pins. Tie high to connect the line interface circuitry to the framer/formatter
circuitry and deactivate the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/RCLKI pins. When
LIUC is tied high, the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/RCLKI pins should be
tied low.
16, 17
RTIP,
RRING
Receive Tip and Ring. Analog inputs for clock recovery circuitry. These pins connect
via a 1:1 transformer to the T1 line. See Section 15 for details.
29, 32
TTIP,
TRING
Transmit Tip and Ring. Analog line driver outputs. These pins connect via a 1:1.15 or
1:1.36 step-up transformer to the T1 line. See Section 15 for details.
2.5 Supply Pins
PIN
NAME
FUNCTION
44, 61,
81, 83
DVDD
Digital Positive Supply. 5.0V ±5%. Should be tied to the RVDD and TVDD pins.
18
RVDD
Receive Analog Positive Supply. 5.0V ±5%. Should be tied to the DVDD and TVDD
pins.
31
TVDD
Transmit Analog Positive Supply. 5.0V ±5%. Should be tied to the RVDD and DVDD
pins.
45, 60,
80, 84
DVSS
Digital Signal Ground. Should be tied to the RVSS and TVSS pins.
19, 20,
24
RVSS
Receive Analog Signal Ground. 0V. Should be tied to the DVSS and TVSS pins.
30
TVSS
Transmit Analog Ground. 0V. Should be tied to the RVSS and DVSS pins.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2152L+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Enhanced T1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2152L-ES 制造商:DALL 功能描述:
DS2152LN 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2152LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2153DK 功能描述:KIT DESIGN TXRX E1 DS2153 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP
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