CC=2.7V to 5.5V) PARAMETER SYMBOL MIN" />
參數(shù)資料
型號: DS18030-100+
廠商: Maxim Integrated Products
文件頁數(shù): 9/11頁
文件大?。?/td> 0K
描述: IC POT DUAL ADDRESS 100K 16-DIP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 25
接片: 256
電阻(歐姆): 100k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 750 ppm/°C
存儲器類型: 易失
接口: I²C(芯片選擇)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 16-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-PDIP
包裝: 管件
產(chǎn)品目錄頁面: 1431 (CN2011-ZH PDF)
DS1803
7 of 11
ANALOG RESISTOR CHARACTERISTICS
(-40
°C to +85°C;V
CC=2.7V to 5.5V)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
End-to-End Resistor Tolerance
-20
+20
%
17
Absolute Linearity
±0.75
LSB
13
Relative Linearity
±0.3
LSB
14
-3 dB Cutoff Frequency
fCUTOFF
Hz
11
Temperature Coefficient
750
ppm/
°C
Capacitance
CI
5
pF
AC ELECTRICAL CHARACTERISTICS
(-40
°C to +85°C;V
CC=2.7V to 5.5V)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
SCL Clock Frequency
fSCL
0
400
100
kHz
15
16
Bus Free Time Between
STOP and START Condition
tBUF
1.3
4.7
μs
15
16
Hold Time (Repeated)
START Condition
tHD:STA
0.6
4.0
μs
5
Low Period of SCL Clock
tLOW
1.3
4.7
μs
High Period of SCL Clock
tHIGH
0.6
4.0
μs
Data Hold Time
tHD :DAT
0
0.9
μs
6,7
Data Setup Time
tSU :DAT
100
250
ns
8
Rise Time of both SDA and
SCL Signals
tR
20+1CB
300
1000
ns
9
Fall Time of both SDA and
SCL Signals
tF
20+1CB
300
ns
9
Setup Time for STOP
Condition
tSU:STO
0.6
4.0
s
Capacitive Load for each Bus
Line
CB
400
pF
9
NOTES:
1. All voltages are referenced to ground. Currents flowing into device pins are positive. Currents out of
the device pins are negative.
2. I/O pins of fast mode devices will not obstruct SDA and SCL even if VCC is switched off.
3. ICC specified with SDA pin open, SCL = 400 kHz clock rate.
4. ISTBY specified with VCC at 5.0V and SDA, SCL = 5.0V.
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