DS17285/DS17287
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WR
(RTC Write Input; active low) - The WR signal is an active low signal. The WR signal defines
the time period during which data is written to the addressed register.
CS
(RTC Chip Select Input; active low) - The Chip Select signal must be asserted low during a bus
cycle for DS17285/DS17287 to be accessed. CS must be kept in the active state during RD and WR
timing. Bus cycles which take place with ALE asserted but without asserting CS will latch addresses.
However, no data transfer will occur.
IRQ
(Interrupt Request Output; open drain, active low) - The IRQ pin is an active low output of the
DS17285/DS17287 that can be tied to the interrupt input of a processor. The IRQ output remains low as
long as the status bit causing the interrupt is present and the corresponding interrupt-enable bit is set. To
clear the IRQ pin, the application software must clear all enabled flag bits contributing to IRQ ’s active
state.
When no interrupt conditions are present, the IRQ level is in the high impedance state. Multiple
interrupting devices can be connected to an IRQ bus. The IRQ pin is an open drain output and requires
an external pull-up resistor. The voltage on the pull up supply should be no greater than VCC + 0.2 volts.
PWR
(Power On Output; open drain, active low) - The PWR pin is intended for use as an on/off
control for the system power. With VCC voltage removed from the DS17285/DS17287, PWR may be
automatically activated from a kickstart input via the KS pin or from a Wake-Up interrupt. Once the
system is powered on, the state of PWR can be controlled via bits in the Dallas registers. The PWR pin
may be connected through a pull up resistor to a positive supply. For 5-volt operation, the voltage of the
pull up supply should be no greater than 5.7 volts. For 3 volt operation, the voltage on the pull up supply
should be no greater than 3.9 volts.
KS
(Kickstart Input; active low) - When VCC is removed from the DS17285/DS17287, the system can
be powered on in response to an active low transition on the KS pin, as might be generated from a key
closure. VBAUX must be present and Auxiliary Battery Enable bit (ABE) must be set to 1 if the Kickstart
function is used, and the KS pin must be pulled up to the VBAUX supply. While VCC is applied, the KS
pin can be used as an interrupt input.
RCLR
(RAM Clear Input; active low) - If enabled by software, taking RCLR low will result in the
clearing of the 114 bytes of user RAM. When enabled, RCLR can be activated whether or not VCC is
present.
VBAUX – Auxiliary battery input required for kickstart and wake-up features. This input also supports
clock/ calendar and user RAM if VBAT is at lower voltage or is not present. A standard +3-volt lithium
cell or other energy source can be used. For 3-volt operation, VBAUX must be held between +2.5 and
+3.7 volts. For 5-volt operation, VBAUX must be held between +2.5 and +5.2 volts . If VBAUX is not going
to be used it should be grounded and auxiliary battery enable bit bank 1, register 4BH, should=0.