參數(shù)資料
型號: DS1486P-120+
廠商: Maxim Integrated Products
文件頁數(shù): 8/14頁
文件大?。?/td> 0K
描述: IC TIMEKEEPER RAM 1MB 34-PCM
標準包裝: 40
類型: 時鐘/日歷
特點: 警報器,閏年,NVSRAM,方波輸出,監(jiān)視計時器
存儲容量: 128KB
時間格式: HH:MM:SS:hh(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: 并聯(lián)
電源電壓: 4.5 V ~ 5.5 V
電壓 - 電源,電池: 3.3V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 34-PowerCap? 模塊
供應商設備封裝: 34-PowerCap 模塊
包裝: 管件
DS1486/DS1486P
3 of 14
DESCRIPTION
The DS1486 is a nonvolatile static RAM with a full-function real-time clock (RTC), alarm, watchdog
timer, and interval timer, which are all accessible in a byte-wide format. The DS1486 contains a lithium
energy source and a quartz crystal, which eliminate the need for any external circuitry. Data contained
within 128K by 8-bit memory and the timekeeping registers can be read or written in the same manner as
byte-wide static RAM. The timekeeping registers are located in the first 14 bytes of memory space. Data
is maintained in the RAMified timekeeper by intelligent control circuitry, which detects the status of VCC
and write-protects memory when VCC is out of tolerance. The lithium energy source can maintain data and
real time for over 10 years in the absence of VCC. Timekeeper information includes hundredths of
seconds, seconds, minutes, hours, day, date, month, and year. The date at the end of the month is
automatically adjusted for months with fewer than 31 days, including correction for leap year. The
RAMified timekeeper operates in either 24-hour or 12-hour format with an AM/PM indicator. The
watchdog timer provides alarm interrupts and interval timing between 0.01 seconds and 99.99 seconds.
The real time alarm provides for preset times of up to one week. Interrupts for both watchdog and RTC
will operate when the system is powered down. Either can provide system “wake-up” signals.
PACKAGES
The DS1486 is available in two packages: a 32-pin DIP module and 34-pin PowerCap module. The 32-
pin DIP-style module integrates the crystal, lithium energy source, and silicon all in one package. The 32-
pin PowerCap Module Board is designed with contacts for connection to a separate PowerCap
(DS90934PCX) that contains the crystal and battery. The design allows the PowerCap to be mounted on
top of the DS1486P after the completion of the surface mount process. Mounting the PowerCap after the
surface mount process prevents damage to the crystal and battery due to high temperatures required for
solder reflow. The PowerCap is keyed to prevent reverse insertion. The PowerCap Module Board and
PowerCap are ordered separately and shipped in separate containers. The part number for the PowerCap
is DS9034PCX.
Table 1. Truth Table
VCC
CE
OE
WE
MODE
DQ
POWER
VIH
X
Deselect
High-Z
Standby
X
Deselect
High-Z
Standby
VIL
X
VIL
Write
Data In
Active
VIL
VIH
Read
Data Out
Active
5V
±10%
VIL
VIH
Read
High-Z
Active
<4.5V > VBAT
X
Deselect
High-Z
CMOS Standby
<VBAT
X
Deselect
High-Z
Data Retention Mode
OPERATION—READ REGISTERS
The DS1486 executes a read cycle whenever
WE (Write Enable) is inactive (High), CE (Chip Enable)
and
OE (Output Enable) are active (Low). The unique address specified by the address inputs (A0–A16)
defines which of the registers is to be accessed. Valid data will be available to the eight data output
drivers within tACC (Access Time) after the last address input signal is stable, providing that CE and OE
access times are also satisfied. If
OE and CE access times are not satisfied, then data access must be
measured from the latter occurring signal (
CE or OE) and the limiting parameter is either tCO for CE or
tOE for OE rather than address access.
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