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參數(shù)資料
| 型號： | DS1124U-25+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DELAY LINE 256TAP 10-USOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 標(biāo)片/步級數(shù)： | 256 |
| 功能： | 可編程 |
| 延遲到第一抽頭： | 20ns |
| 接頭增量： | 0.25ns |
| 可用的總延遲： | 83.75ns |
| 獨立延遲數(shù)： | 1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-µMAX |
| 包裝： | 帶卷 (TR) |
DS1124
Detailed Description
The DS1124 is an 8-bit programmable delay line that
can be adjusted between 256 different delay intervals.
The DS1124 architecture (see Figure 2) allows some
signals to be delayed by more than one period, which
lets the phase of the signal to be adjusted up to a full
360°. Programming is performed by a 3-wire serial
interface. Using the 3-wire interface, it is possible to
cascade multiple devices together for systems requir-
ing multiple programmable delays without using addi-
tional I/O resources.
Using the Serial Programming Interface
Serial mode operates similar to a shift register. When the
E pin is set at a high logic level, it enables the shift regis-
ter and CLK clocks the data, D, into the register one bit at
a time starting with the most significant bit. After all 8 bits
are shifted into the DS1124, E must be pulled low to end
the data transfer and activate the new value. A settling
time (tEDV) is required after E is pulled low before the
signal delay will meet its specified accuracy. A timing
diagram for the serial interface is shown in Figure 3.
The 3-wire interface also has an output (Q) that can be
used to cascade multiple 3-wire devices, and it can be
used to read the current value of the devices on the
bus. To read the current values stored by the 3-wire
device(s), the latch must be enabled and the value of Q
must be read and then written back to D before the reg-
ister is clocked. This causes the current value of the
register to be written back into the DS1124 as it is
being read. This can be accomplished in a couple of
different ways. If the microprocessor has an I/O pin that
is high impedance when set as an input, a feedback
resistor (RFB, generally between 1k
Ω and 10kΩ) can be
used to write the data on Q back to D as the value is
read, see Figure 4A. If the microprocessor has an inter-
nal pullup on its I/O pins, or only offers separate input
and output pins, the value in the register can still be
read. The circuit shown in Figure 4B allows the Q val-
ues to read by the microprocessor, which must write
the Q value to D before it can clock the bus to read the
next bit. If the Q values are read without writing them to
D (with the pullup or otherwise), the read will be
destructive. A destructive read cycle likely results in an
undesirable change in the delay setting.
5.0V 8-Bit Programmable
Timing Element
6
_______________________________________________________________________________________
Block Diagram
8-BIT LATCH
8-BIT SHIFT
REGISTER
PROGRAMMABLE
DELAY
8
Q
CLK
D
OUT
IN
E
8
DS1124
tSTEP
256 CONTROL LINES
8-BIT LATCH VALUE
255 UNIT DELAY CELLS
256 LINE DECODER
IN
OUT
DS1124
Figure 2. Conceptual Design
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS112-B | 制造商:Cooper Hand Tools / Weller 功能描述: |
| DS1-12D | 功能描述:二極管 - 通用，功率，開關(guān) 1 Amps 1200V RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Switching Diodes 峰值反向電壓:600 V 正向連續(xù)電流:200 A 最大浪涌電流:800 A 配置: 恢復(fù)時間:2000 ns 正向電壓下降:1.25 V 最大反向漏泄電流:300 uA 最大功率耗散: 工作溫度范圍: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:ISOTOP 封裝:Tube |
| DS112HM | 制造商:Cooper Tools / Weller 功能描述:Bulk 制造商:Cooper Hand Tools / Weller 功能描述:NOZZLE METRIC 1.0MM 制造商:WELLER 功能描述:NOZZLE, METRIC, 1.0MM |
| DS112PIN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Industrial Control IC |
| DS-112PIN | 制造商:MA-COM 制造商全稱:M/A-COM Technology Solutions, Inc. 功能描述:Four-Way Power Dividers 10 - 500 MHz |
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