參數(shù)資料
型號: DC847A
廠商: Linear Technology
文件頁數(shù): 7/28頁
文件大?。?/td> 0K
描述: BOARD DELTA SIGMA ADC LTC2446
軟件下載: QuikEval System
設(shè)計資源: DC847A Design File
DC847A Schematic
標準包裝: 1
系列: QuikEval™
ADC 的數(shù)量: 1
位數(shù): 24
采樣率(每秒): 8k
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
已用 IC / 零件: LTC2446
已供物品:
相關(guān)產(chǎn)品: LTC2446CUHF#PBF-ND - IC ADC 24BIT 8CH HI SPEED 38QFN
LTC2446IUHF#PBF-ND - IC ADC 24BIT 8CH HI SPEED 38QFN
LTC2446IUHF#TRPBF-ND - IC ADC 24BIT 8CH HI SPEED 38QFN
LTC2446CUHF#TRPBF-ND - IC ADC 24BIT 8CH HI SPEED 38QFN
LTC2446/LTC2447
15
24467fa
External Serial Clock, Single Cycle Operation
(SPI/MICROWIRE Compatible)
This timing mode uses an external serial clock to shift out
the conversion result and a CS signal to monitor and
control the state of the conversion cycle, see Figure 4.
The serial clock mode is selected by the EXT pin. To select
the external serial clock mode, EXT must be tied low.
The serial data output pin (SDO) is Hi-Z as long as CS is
HIGH. At any time during the conversion cycle, CS may be
pulled LOW in order to monitor the state of the converter.
While CS is pulled LOW, EOC is output to the SDO pin.
EOC = 1 (BUSY = 1) while a conversion is in progress and
EOC = 0 (BUSY = 0) if the device is in the sleep state.
Independent of CS, the device automatically enters the low
power sleep state once the conversion is complete.
When the device is in the sleep state (EOC = 0), its
conversion result is held in an internal static shift regis-
ter. The device remains in the sleep state until the first
rising edge of SCK is seen. Data is shifted out the SDO pin
on each falling edge of SCK. This enables external circuitry
to latch the output on the rising edge of SCK. EOC can be
latched on the first rising edge of SCK and the last bit of
the conversion result can be latched on the 32nd rising
edge of SCK. On the 32nd falling edge of SCK, the device
begins a new conversion. SDO goes HIGH (EOC = 1) and
BUSY goes HIGH indicating a conversion is in progress.
At the conclusion of the data cycle, CS may remain LOW
and EOC monitored as an end-of-conversion interrupt.
Alternatively, CS may be driven HIGH setting SDO to Hi-Z
and BUSY monitored for the completion of a conversion.
Figure 4. External Serial Clock, Single Cycle Operation
APPLICATIO S I FOR ATIO
WU
UU
MSB
BIT 28 BIT 27 BIT 26 BIT 25 BIT 24 BIT 23 BIT 22 BIT 21
BIT 20 BIT 19
BIT 0
LSB
Hi-Z
24467 F04
SIG
BIT 29
“0”
BIT 30
EOC
Hi-Z
CS
SCK
(EXTERNAL)
SDI
SDO
BUSY
BIT 31
1
0
EN
SGL
GLBL
A1
A0
OSR3
OSR2
OSR1
OSR0
TWOX
ODD
12345
6
7
89
10
11
12
13
14
32
CONVERSION
SLEEP
DATA OUTPUT
CONVERSION
TEST EOC
VCC
FO
REF67+
REF67
CH0
CH1
CH2
CH7
COM
REFG+
REFG
REF01+
REF01
SCK
SDI
SDO
CS
GND
28
29
30
11
10
35
24
23
8
9
12
22
7
38
37
1,4,5,6,31,32,33
36
34
USER SELECTABLE
REFERENCES
0.1V TO VCC
ANALOG
INPUTS
...
2
= EXTERNAL OSCILLATOR
= INTERNAL OSCILLATOR
1
F
4.5V TO 5.5V
LTC2446
4-WIRE
SPI INTERFACE
BUSY
相關(guān)PDF資料
PDF描述
DC790A BOARD DELTA SIGMA ADC LTC2439-1
EVAL-AD5535EBZ BOARD EVALUATION FOR AD5535
SDR0403-390KL INDUCTOR POWER 39UH 0.59A 0403
EBA22DRMD CONN EDGECARD 44POS .125 SQ WW
EVAL-AD5757SDZ BOARD EVAL FOR AD5757
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DC850 制造商:Molex 功能描述:
DC852A 功能描述:BOARD DEMO FOR LTC4354 RoHS:是 類別:未定義的類別 >> 其它 系列:* 標準包裝:1 系列:* 其它名稱:MS305720A
DC8550 制造商:DCCOM 制造商全稱:Dc Components 功能描述:TECHNICAL SPECIFICATIONS OF PNP EPITAXIAL PLANAR TRANSISTOR
DC8550S 制造商:DCCOM 制造商全稱:Dc Components 功能描述:TECHNICAL SPECIFICATIONS OF PNP EPITAXIAL PLANAR TRANSISTOR
DC859A 功能描述:EVAL BOARD FOR LTC4267 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:- 主要目的:數(shù)字電位器 嵌入式:- 已用 IC / 零件:AD5258 主要屬性:- 次要屬性:- 已供物品:板 相關(guān)產(chǎn)品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP