參數(shù)資料
型號(hào)： DC1011A-B
廠(chǎng)商： Linear Technology
文件頁(yè)數(shù)： 20/32頁(yè)
文件大?。?/td> 0K
描述： BOARD DELTA SIGMA ADC LTC2496
軟件下載： QuikEval System
設(shè)計(jì)資源： DC1011A Schematic
DC1011A Design Files
標(biāo)準(zhǔn)包裝： 1
系列： Easy Drive™, QuikEval™
ADC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 6.9
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
已用 IC / 零件： LTC2496
已供物品： 板
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LTC2496
2496fb
applicaTions inForMaTion
Theusercanexpecttoachievethislevelofperformanceus-
ing the internal oscillator, as shown in Figure 19. Measured
values of normal mode rejection are shown superimposed
over the theoretical rejection.
Traditional high order delta-sigma modulators suffer
from potential instabilities at large input signal levels.
The proprietary architecture used for the LTC2496 third
order modulator resolves this problem and guarantees
stability with input signals 150% of full-scale. In many
industrial applications, it is not uncommon to have mi-
crovolt level signals superimposed over unwanted error
sources with several volts of peak-to-peak noise. Figure
20 shows measurement results for the rejection of a 7.5V
peak-to-peak noise source (150% of full scale) applied
to the LTC2496. From these curves, it is shown that the
rejection performance is maintained even in extremely
noisy environments.
INPUT FREQUENCY (Hz)
0
20
40
60
80
100
120
140
160
180
200
220
NORMAL
MODE
REJECTION
(dB)
2496 F19
0
–20
–40
–60
–80
–100
–120
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
VIN(P-P) = 5V
TA = 25°C
MEASURED DATA
CALCULATED DATA
INPUT SIGNAL FREQUENCY (Hz)
INPUT
NORMAL
MODE
REJECTION
(dB)
2496 F17
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
fN
0
2fN 3fN 4fN 5fN 6fN 7fN 8fN
fN = fEOSC/5120
Figure 17. Input Normal Mode Rejection at DC
INPUT SIGNAL FREQUENCY (Hz)
250fN 252fN 254fN 256fN 258fN 260fN 262fN
INPUT
NORMAL
MODE
REJECTION
(dB)
2496 F18
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
Figure 18. Input Normal Mode Rejection at fS = 256 fN
Figure 19. Input Normal Mode Rejection vs Input Frequency with
Input Perturbation of 100% (50Hz/60Hz Notch)
Output Data Rate
Whenusingitsinternaloscillator,theLTC2496producesup
to 6.9 samples per second (sps) with a notch frequency of
55Hz. The actual output data rate depends upon the length
of the sleep and data output cycles which are controlled
by the user and can be made insignificantly short. When
operating with an external conversion clock (fO connected
to an external oscillator), the LTC2496 output data rate
can be increased. The duration of the conversion cycle
is 41036/fEOSC. If fEOSC = 307.2kHz, the converter notch
frequency is 60Hz.
An increase in fEOSC over the nominal 307.2kHz will trans-
late into a proportional increase in the maximum output
data rate (up to a maximum of 100sps). The increase in
output rate leads to degradation in offset, full-scale error,
and effective resolution as well as a shift in frequency
rejection.
INPUT FREQUENCY (Hz)
0
15
30
45
60
75
90 105 120 135 150 165 180 195 210 225 240
NORMAL
MODE
REJECTION
(dB)
2496 F20
0
–20
–40
–60
–80
–100
–120
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
TA = 25°C
VIN(P-P) = 5V
VIN(P-P) = 7.5V
(150% OF FULL SCALE)
Figure 20. Input Normal Mode Rejection vs Input Frequency with
Input Perturbation of 150% (60Hz Notch)
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