參數(shù)資料
型號(hào): DAC1408D650HN
廠商: NXP SEMICONDUCTORS
元件分類(lèi): DAC
英文描述: Dual 14-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
中文描述: 14-BIT DAC, PQCC64
封裝: 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, VQFN-64
文件頁(yè)數(shù): 81/98頁(yè)
文件大?。?/td> 2600K
代理商: DAC1408D650HN
DAC1408D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 26 November 2010
81 of 98
NXP Semiconductors
DAC1408D650
2
, 4
or 8
interpolating DAC with JESD204A
Table 161. LN1_CFG_3 register (address 13h) bit description
Default settings are shown highlighted.
Bit
Symbol
7
LN1_SCR
4 to 0
LN1_L[4:0]
Access
R
R
Value
-
-
Description
scrambling on
number of lanes minus 1
Table 162. LN1_CFG_4 register (address 14h) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 0
LN1_F[7:0]
Access
R
Value
-
Description
number of octets per frame minus 1
Table 163. LN1_CFG_5 register (address 15h) bit description
Default settings are shown highlighted.
Bit
Symbol
4 to 0
LN1_K[4:0]
Access
R
Value
-
Description
number of frames per multiframe minus 1
Table 164. LN1_CFG_6 register (address 16h) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 0
LN1_M[7:0]
Access
R
Value
-
Description
number of converters per device minus 1
Table 165. LN1_CFG_7 register (address 17h) bit description
Default settings are shown highlighted.
Bit
7 to 6
4 to 0
Symbol
LN1_CS[1:0]
LN1_N[4:0]
Access
R
R
Value
-
-
Description
number of control bits
converter resolution minus 1
Table 166. LN1_CFG_8 register (address 18h) bit description
Default settings are shown highlighted.
Bit
Symbol
4 to 0
LN1_N’[4:0]
Access
R
Value
-
Description
number of bits per sample minus 1
Table 167. LN1_CFG_9 register (address 19h) bit description
Default settings are shown highlighted.
Bit
Symbol
4 to 0
LN1_S[4:0]
Access
R
Value
-
Description
number of samples per converter per frame cycle
minus 1
Table 168. LN1_CFG_10 register (address 1Ah) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 6
LN1_HD
4 to 0
LN1_CF[4:0]
Access
R
R
Value
-
-
Description
high density
number of control words per frame cycle
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