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| 型號： | DAC1408D650HN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | DAC |
| 英文描述： | Dual 14-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating |
| 中文描述： | 14-BIT DAC, PQCC64 |
| 封裝： | 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, VQFN-64 |
| 文件頁數(shù)： | 11/98頁 |
| 文件大?。?/td> | 2600K |
| 代理商： | DAC1408D650HN |
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DAC1408D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 26 November 2010
11 of 98
NXP Semiconductors
DAC1408D650
2
, 4
or 8
interpolating DAC with JESD204A
[1]
D = guaranteed by design; C = guaranteed by characterization; I = 100 % industrially tested.
[2]
Delay between the deassertion of bits FORCE_RESET_FCLK and FORCE_RESET_DCLK and the deassertion of the sync signal. It
reflects the delay required by DAC1408D650 to lock to a JESD204A stream. It supposes that the TX is already transmitting K28.5
characters in error-free conditions.
[3]
CLKINP/CLKINN inputs are at differential LVDS levels. An external termination resistor with a value of between 80
and 120
(see
Figure 15
) should be connected across the pins.
[4]
V
gpd
represents the ground potential difference voltage. This is the voltage that results from current flowing through the finite resistance
and the inductance between the receiver and the driver circuit ground voltage.
[5]
Vin_p and Vin_n inputs are differential CML inputs. They are terminated internally to V
tt
via 50
(see
Figure 4
).
SYNC_OUTP/SYNC_OUTN outputs are differential LVDS outputs. They must be terminated by a resistor with a value of between 80
and 120
.
[6]
[7]
IMD3 rejection with
6 dBFS/tone.
10. Application information
10.1 General description
The DAC1408D650 is a dual 14-bit DAC operating up to 650 Msps. With a maximum input
data rate of up to 312.5 Msps and a maximum output sampling rate of 650 Msps, the
DAC1408D650 allows more flexibility for wide bandwidth and multi-carrier systems.
Combined with its quadrature modulator and 32-bit NCO, the DAC1408D650 simplifies
the frequency selection of the system. This is also possible because of the 2
, 4
or 8
interpolation filters which remove undesired images.
DAC1408D650 supports the following JESD204A key features:
10-bit/8-bit decoding
Code group synchronization
inter-lane alignment
Character replacement
TX/RX synchronization management via sync signals
Multiple Converter Device Alignment-Multiple Lanes (MCDA-ML) device
scrambling polynomial
DAC1408D650 can be interfaced with any logic device that features high speed SERDES
functionality. This macro is now widely available in FPGA from different vendors.
Standalone SERDES ICs can also be used.
To enhance the intrinsic board layout simplification of the JESD204A standard, NXP
includes polarity swapping for each of the lanes and additionally offers lane swapping.
Each physical lane can be configured logically as lane0, lane1, lane2 or lane3.
NSD
noise spectral density
f
s
= 640 Msps;
4
interpolation;
f
o
= 133 MHz at 0 dBFS
I
-
156
-
dBm/Hz
Table 5.
V
DDA(1V8)
= V
DDD
= 1.7 V to 1.9 V; V
DDA(3V3)
= 3.13 V to 3.47 V; AGND and GND are shorted together; T
amb
=
40
C to
+85
C; typical values measured at V
DDA(1V8)
= V
DDD
= 1.8 V; V
DDA(3V3)
= 3.3 V; T
amb
= +25
C; R
L
= 50
; I
O(fs)
= 20 mA;
maximum sample rate; PLL off unless otherwise specified.
Symbol
Parameter
Conditions
Characteristics
…continued
Test
[1]
Min
Typ
Max
Unit
1
x
14
x
15
+
+
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| DAC1408D650HN/C1,5 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC DL 14BIT DAC 650MSPS 2X 4X OR 8X INT RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1408D650HN-C1 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1408D650HN-C18 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC1408D650HW/C1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 14-bit DAC, up to 650 Msps, 2′ and 4′ interpolating with JESD204A interface |
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