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參數(shù)資料
| 型號(hào)： | CY28447LFXC |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 9/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK CALISTOGA CK410M 72QFN |
| 標(biāo)準(zhǔn)包裝： | 240 |
| 類型： | 時(shí)鐘/頻率發(fā)生器 |
| PLL： | 是 |
| 主要目的： | Intel CPU 服務(wù)器 |
| 輸入： | LVTTL，晶體 |
| 輸出： | HCSL，LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:21 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 200MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 72-QFN（10x10） |
| 包裝： | 托盤 |
CY28447
...................... Document #: 38-07724 Rev *C Page 17 of 22
VHIGH
Voltage High
Math averages Figure 17
660
850
mV
VLOW
Voltage Low
Math averages Figure 17
–150
–
mV
VOX
Crossing Point Voltage at 0.7V Swing
250
550
mV
VOVS
Maximum Overshoot Voltage
–
VHIGH +
0.3
V
VUDS
Minimum Undershoot Voltage
–0.3
–
V
VRB
Ring Back Voltage
See Figure 17. Measure SE
–
0.2
V
SRC at 0.7V
TDC
SRCT and SRCC Duty Cycle
Measured at crossing point VOX
45
55
%
TPERIOD
100-MHz SRCT and SRCC Period
Measured at crossing point VOX
9.997001
10.00300
ns
TPERIODSS
100-MHz SRCT and SRCC Period, SSC Measured at crossing point VOX
9.997001
10.05327
ns
TPERIODAbs
100-MHz SRCT and SRCC Absolute
Period
Measured at crossing point VOX
9.872001
10.12800
ns
TPERIODSSAbs 100-MHz SRCT and SRCC Absolute
Period, SSC
Measured at crossing point VOX
9.872001
10.17827
ns
TSKEW
Any SRCT/C to SRCT/C Clock Skew
Measured at crossing point VOX
–250
ps
TCCJ
SRCT/C Cycle to Cycle Jitter
Measured at crossing point VOX
–
125[2]
ps
LACC
SRCT/C Long Term Accuracy
Measured at crossing point VOX
–
300
ppm
TR / TF
SRCT and SRCC Rise and Fall Time
Measured from VOL = 0.175 to
VOH = 0.525V
175
800
ps
TRFM
Rise/Fall Matching
Determined as a fraction of
2*(TR – TF)/(TR + TF)
–20
%
T
R
Rise TimeVariation
–
125
ps
T
F
Fall Time Variation
–
125
ps
VHIGH
Voltage High
Math averages Figure 17
660
850
mV
VLOW
Voltage Low
Math averages Figure 17
–150
–
mV
VOX
Crossing Point Voltage at 0.7V Swing
180
550
mV
VOVS
Maximum Overshoot Voltage
–
VHIGH +
0.3
V
VUDS
Minimum Undershoot Voltage
–0.3
–
V
VRB
Ring Back Voltage
See Figure 17. Measure SE
–
0.2
V
LCD 96_100M_SSC at 0.7V
TDC
SSCT and SSCC Duty Cycle
Measured at crossing point VOX
45
55
%
TPERIOD
100-MHz SSCT and SSCC Period
Measured at crossing point VOX
9.997001
10.00300
ns
TPERIODSS
100-MHz SSCT and SSCC Period, SSC Measured at crossing point VOX
9.997001
10.05327
ns
TPERIODAbs
100-MHz SSCT and SSCC Absolute
Period
Measured at crossing point VOX
9.872001
10.12800
ns
TPERIODSSAbs 100-MHz SRCT and SRCC Absolute
Period, SSC
Measured at crossing point VOX
9.872001
10.17827
ns
TPERIOD
96-MHz SSCT and SSCC Period
Measured at crossing point VOX
10.41354
10.41979
ns
TPERIODSS
96-MHz SSCT and SSCC Period, SSC Measured at crossing point VOX
10.41354
10.47215
ns
TPERIODAbs
96-MHz SSCT and SSCC Absolute
Period
Measured at crossing point VOX
10.16354
10.66979
ns
TPERIODSSAbs 96-MHz SRCT and SRCC Absolute
Period, SSC
Measured at crossing point VOX
10.16354
10.72266
ns
TCCJ
SSCT/C Cycle to Cycle Jitter
Measured at crossing point VOX
–125
ps
LACC
SSCT/C Long Term Accuracy
Measured at crossing point VOX
–
300
ppm
AC Electrical Specifications (continued)
Parameter
Description
Condition
Min.
Max.
Unit
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