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參數(shù)資料
| 型號： | CXP402R |
| 英文描述： | 4-Bit Microcontroller |
| 中文描述： | 4位微控制器 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大?。?/td> | 262K |
| 代理商： | CXP402R |
– 6 –
CXP402
Symbol
I/O
Description
Positive power supply.
GND.
Positive power supply for analog circuit.
GND for analog circuit.
Positive power supply for oscillation circuit.
GND for oscillation circuit.
Test for LSI.
Connect to GND for normal operation.
Input
Input
Input
Input
V
DD
V
SS
AV
DD
AV
SS
XV
DD
XV
SS
TEST1
TEST0
DTEST
CTEST
Notes
Power supply pins AV
DD
, AVss, XV
DD
, XVss, V
DD
and Vss should process all the pins.
PCMD is the MSB first, two's complement output.
GTOP is used to monitor the frame sync protection status. (High: sync protection window open.)
XUGF is the frame sync obtained from the EFM signal, and is negative pulse. It is the signal before sync
protection.
XPLCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the EFM signal
transition point coincide.
The GFS signal goes high when the frame sync and the insertion timing match.
RFCK is derived from the crystal accuracy, and has a cycle of 136μs (at normal speed).
C2PO represents the data error status.
XRAOF is generated when the 16K RAM exceeds the ±4F jitter margin.
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