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參數(shù)資料
| 型號： | CXK5T81000ATN-10LLX |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 100 ns, PDSO32 |
| 封裝： | 8 X 13.40 MM, PLASTIC, TSOP-32 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 169K |
| 代理商： | CXK5T81000ATN-10LLX |
– 5 –
CXK5T81000ATN/AYN
Read cycle
(WE = “H”)
1
t
HZ1
, t
HZ2
and t
OHZ
are defined as the time required for outputs to turn to high impedance state and are not
referred to as output voltage levels.
2
t
WHZ
is defined as the time required for outputs to turn to high impedance state and is not referred to as
output voltage level.
Write cycle
Item
Symbol
Min.
Max.
Min.
Max.
-10LLX
V
CC
= 2.7 to 3.6V
V
CC
= 3.3V ± 0.3V
-12LLX
Unit
t
RC
t
AA
t
CO1
t
CO2
t
OE
t
OH
t
LZ1
t
LZ2
t
OLZ
t
HZ1
1
t
HZ2
1
t
OHZ
1
100
—
—
—
—
10
10
5
—
—
—
100
100
100
50
—
—
—
40
35
120
—
—
—
—
10
10
5
—
—
—
120
120
120
60
—
—
—
40
35
Min.
Max.
Min.
Max.
-10LLX
-12LLX
85
—
—
—
—
10
10
5
—
—
—
85
85
85
40
—
—
—
35
30
100
—
—
—
—
10
10
5
—
—
100
100
100
50
—
—
—
40
35
Read cycle time
Address access time
Chip enable access time (CE1)
Chip enable access time (CE2)
Output enable to output valid
Output hold from address change
Chip enable to output in low Z
(CE1, CE2)
Output enable to output in low Z (OE)
Chip disable to output in high Z
(CE1, CE2)
Output disable to output in high Z (OE)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Item
Symbol
Min.
Max.
Min.
Max.
-10LLX
V
CC
= 2.7 to 3.6V
V
CC
= 3.3V ± 0.3V
-12LLX
Unit
t
WC
t
AW
t
CW
t
DW
t
DH
t
WP
t
AS
t
WR
t
WR1
t
OW
t
WHZ
2
100
80
80
40
0
70
0
0
0
5
—
—
—
—
—
—
—
—
—
—
—
40
120
100
100
50
0
70
0
0
0
5
—
—
—
—
—
—
—
—
—
—
—
40
Min.
Max.
Min.
Max.
-10LLX
-12LLX
85
70
70
35
0
60
0
0
0
5
—
—
—
—
—
—
—
—
—
—
—
35
100
80
80
40
0
70
0
0
0
5
—
—
—
—
—
—
—
—
—
—
—
40
Write cycle time
Address valid to end of write
Chip enable to end of write
Data to write time overlap
Data hold from write time
Write pulse width
Address setup time
Write recovery time (WE)
Write recovery time (CE1, CE2)
Output active from end of write
Write to output in high Z
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CXK5T81000ATN-12LLX | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:131072-word X 8-bit High Speed CMOS Static RAM |
| CXK5T81000AYM | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:131072-word x 8-bit High Speed CMOS Static RAM |
| CXK5T81000AYM-10LLX | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:131072-word x 8-bit High Speed CMOS Static RAM |
| CXK5T81000AYM-12LLX | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:131072-word x 8-bit High Speed CMOS Static RAM |
| CXK5T81000AYN | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:131072-word X 8-bit High Speed CMOS Static RAM |
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