參數(shù)資料
型號(hào): CX74038-12
廠商: SKYWORKS SOLUTIONS INC
元件分類: XO, clock
英文描述: 2.6 GHz/800 MHz Dual Fractional-N/lnteger-N Frequency Synthesizer
中文描述: PLL FREQUENCY SYNTHESIZER, 2600 MHz, PDSO20
封裝: 6.5 X 4.4 MM, 1 MM HEIGHT, TSSOP-20
文件頁(yè)數(shù): 7/12頁(yè)
文件大小: 114K
代理商: CX74038-12
DATA SHEET CX74038
Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 sales@skyworksinc.com www.skyworksinc.com
4
January 31, 2005 Skyworks Proprietary and Confidential information Products and product information are subject to change without notice 101075I
can have a programmable charge pump current from 0.4 mA to
1.6 mA and 120
A to 480 A, respectively.
For optimum performance, the divided reference frequency
presented at the phase detector input must not exceed 9 MHz
using the RF 16/17 prescaler synthesizer mode, 15 MHz using the
RF 8/9 prescaler, or 2 MHz for the IF synthesizer mode. The
comparison frequency is also limited by the desired frequency
divided by the minimum divide ratio.
The charge-pump can be programmed to high impedance (Hi-Z)
state for open-loop VCO modulation use.
Lock Detection
The output of the IF/RF dividers (R1, N1, R2, N2) and lock
detectors for both synthesizers can be multiplexed to the LD pin.
When programmed for lock detection, the CX74038 provides an
active low output to indicate the out-of-lock condition. When
locked, the LD pin is high.
Power Down
The CX74038 supports a number of power-down modes through
the serial interface. Both IF and RF synthesizer blocks can be
powered down, powered up individually, or both powered up
using the EN bits (see the Synthesizer Register Programming
section of this document). The CX74038 is enabled at power up
by default.
Synthesizer Register Programming
IF Integer-N Synthesizer. The N2 17-bit divider ratio is
calculated using the following equation:
IF
N2
F
REF
R2
-------------
=
As with all integer-N synthesizers, the minimum step size is
related to the divided reference frequency, FREF.
RF Fractional-N Synthesizer. The N1 divider ratio is calculated
using the following equation:
RF
F
REF
R1
-------------
N1Total
=
where:
N1Total = N1 + 3.5 + FN + ME
FN sets the fractional-N modulo up to 256 modulo, as calculated
by:
FN
D
9
1
2
---
D
8
1
2
-----
D
7
1
2
3
-----
... + D
2
1
2
8
-----
++
+
=
where:
Dn represents the bit locations within the register field.
The fractional modulo can be extended up to 221 using the modulo
extender (ME), if required, as shown by the following equation:
ME
D
21
1
2
9
-----
D
20
1
2
10
--------
D
19
1
2
11
--------
... +
++
D
9
1
2
21
--------
+
=
Because the way the
Σ modulator is implemented in the
CX74038, the number 3.5 must be added to the division number
to obtain the final division ratio. If the integer field of the N divider
shows a non-integer number, the desired frequency or the
division fraction portion needs to be adjusted.
Sample calculations for two fractional-N applications are shown
in Figure 5.
Electrical and Mechanical Specifications
Signal pin assignments and functional pin descriptions are
specified in Table 1. The absolute maximum ratings of the
CX74038 are provided in Table 2. The recommended operating
conditions are specified in Table 3 and electrical characteristics
are provided in Table 4.
Table 5 provides the register descriptions. Package dimensions
for the CX74038 are shown in Figure 6 and tape and reel
dimensions for the 20-pin TSSOP package are shown in Figure 7.
Electrostatic Discharge Information
The CX74038 is an electrostatic sensitive device. Observe
precautions when handling.
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