
8
DS580F6
CS8406
SWITCHING CHARACTERISTICS - CONTROL PORT - IC MODE
(Inputs: Logic 0 = 0 V, Logic 1 = VL; CL = 20 pF)
13. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Parameter
Symbol
Min
Typ
Max
Units
SCL Clock Frequency
fscl
-
100
kHz
Bus Free Time Between Transmissions
tbuf
4.7
-
s
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
-
s
Clock Low Time
tlow
4.7
-
s
Clock High Time
thigh
4.0
-
s
Setup Time for Repeated Start Condition
tsust
4.7
-
s
SDA Hold Time from SCL Falling
thdd
0-
-
s
SDA Setup Time to SCL Rising
tsud
250
-
ns
Rise Time of Both SDA and SCL Lines
tr
-
1000
ns
Fall Time of Both SDA and SCL Lines
tf
-
300
ns
Setup Time for Stop Condition
tsusp
4.7
-
s
t buf
t hdst
t low
t r
t f
t hdd
t high
t sud
tsust
t susp
Stop
Start
Stop
Repeated
SDA
SCL
Figure 4. IC Mode Timing