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參數(shù)資料
| 型號： | CS5373A-ISZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 21/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC/MODULATOR LP/HP 28-SSOP |
| 標準包裝： | 1,000 |
| 類型： | 調制器 |
| 分辨率（位）： | 24 b |
| 采樣率（每秒）： | 512k |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 電源電壓： | ± 2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 28-SSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | CDB5378-ND - EVALUATION BOARD FOR CS5378 |
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CS5373A
28
DS703F2
7. ANALOG SIGNALS
The CS5373A has multiple differential analog
inputs and outputs. The modulator analog in-
puts are separated into rough and fine charge
differential pairs (INR±, INF±) for maximum
sampling accuracy. Both sets of modulator in-
puts require a simple differential anti-alias RC
filter to ensure high-frequency signals do not
alias into the measurement bandwidth.
The test DAC has a precision differential out-
put (OUT±) that provides the best analog per-
formance,
but
with
only
minimal
drive
capability. A buffered output (BUF±) can drive
an external load, but with reduced analog per-
formance. Finally, the test DAC internal anti-
alias filter requires a dedicated capacitor con-
nection (CAP±) to eliminate undesired high-
frequency signals.
7.1 INR±, INF± Modulator Inputs
The modulator analog inputs are separated
into differential rough and fine signals (INR±,
INF±). The positive half of the differential input
signal is connected to INR+ and INF+, while
the negative half is attached to INF- and INR-.
The INR± pins are switched-capacitor ‘rough
charge’ inputs that pre-charge the internal an-
alog sampling capacitor before it is connected
to the INF± fine input pins.
7.1.1
Modulator Input Impedance
The modulator input has a dynamic switched-
capacitor architecture and so has a rough
charge input impedance that is inversely pro-
portional to the input master clock frequency
and the input capacitor size, [1 / (f * C)].
Internal to the modulator, the rough inputs
(INR±) pre-charge the sampling capacitor
used by the fine inputs (INF±), therefore the in-
put current to the fine inputs is very low and the
effective input impedance is orders of magni-
tude above the impedance of the rough inputs.
7.1.2
Modulator Anti-alias Filter
The modulator inputs are required to be band-
width limited to ensure modulator loop stability
and prevent high-frequency signals from alias-
ing into the measurement band. The use of
simple single-pole differential low-pass RC fil-
ters across the INR± and INF± inputs ensures
high-frequency signals are rejected before
they can alias into the measurement band.
Figure 14. Analog Signals
CS5373A
TDATA
CAP +
CAP -
BUF+
BUF-
OUT+
OUT-
MCLK
M SYNC
GND
MODE1
MODE2
ATT 0
ATT 1
MODE0
ATT 2
VA -
2.5 V
VREF
10
Ω
VREF +
VREF -
100 F
0.1 F
VA+
VA +
VD
0. 1F
0.1F
VD
VA+
10 nF
C0 G
GPIO
CS5378
SIGNALS
MCLK
M SYNC
TBSDATA
GPIO
SENSOR
TEST OUTPUT
ELECTRONICS
TEST OUTPUT
VA-
+
VA-
Route VREF as diff pair
Route OUT as diff pair
Route BUF as diff pair
MDATA
MFLAG
MDATA
MFLAG
INR+
INF+
INF-
INR-
20 nF
*
C0G
20 nF
*
C0 G
INPUT FROM
CS 3301 A/02 A
AM PLIFIER
*Populate with 2 x 10 nF or
1 x 22 nF C0 G or better .
680
Ω
680
Ω
680
Ω
680
Ω
MCLK = 2.048 MHz
INR± Input Cap = 20 pF
Impedance = [1 / (2.048 MHz * 20 pF)] = 24 k
Ω.
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