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參數資料
| 型號： | CS5303GDW28 |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數： | 15/20頁 |
| 文件大小： | 176K |
| 代理商： | CS5303GDW28 |
CS5303
http://onsemi.com
15
within one switching cycle. For a good transient
response
VR should be less than the peak output
voltage overshoot or undershoot.
VR
ConverterZ
ESR
ConverterZ
PwrstgZ
PwrstgZ
ESR
ESR
where:
PwrstgZ
RS
CSA Gain 3
Multiply the converterZ by the output current step
size to calculate where the output voltage should
recover to within the first switching cycle after a
transient. If the ConverterZ is higher than the value
required to recover to where the adaptive positioning
is set the remainder of the recovery will be controlled
by the error amp compensation and will typically
recover in 10 – 20
μ
s.
VR
IOUT
Make sure that
VR is less than the expected peak
transient for a good transient response.
5. Adjust L and R
L
or R
S
as required to meet the best
combination of transient response, steady state output
voltage ripple and pulse width jitter.
ConverterZ
Current Limit
When the sum of the Current Sense amplifiers (V
ITOTAL
)
exceeds the voltage on the I
LIM
pin the part will enter hiccup
mode. For inductive sensing the I
LIM
pin voltage should be
set based on the inductor resistance (or current sense
resistor) at max temperature and max current. To set the level
of the I
LIM
pin:
6.
VI(LIM)
R
IOUT(LIM)
where:
R is R
L
or R
S;
I
OUT(LIM)
is the current limit threshold.
For the overcurrent to work properly the inductor
time constant (L/R) should be
≤
the Current sense RC.
If the RC is too fast, during step loads the current
waveform will appear larger than it is (typically for a
few hundred
μ
s) and may trip the current limit at a
level lower than the DC limit.
CS to ILIMGain
Adaptive Positioning
7. To set the amount of voltage positioning below the
DAC setting at no load connect a resistor (R
V
(
FB
))
between the output voltage and the V
FB
pin. Choose
R
V
(
FB
) as:
RV(FB)
NL Position VFBBias Current
See Figure 4 for V
FB
Bias Current.
8. To set the difference in output voltage between no
load and full load, connect a resistor (R
V(DRP)
)
between the V
DRP
and V
FB
pins. R
V(DRP)
can be
calculated in two steps. First calculate the difference
between the V
DRP
and V
FB
pin at full load. (The V
FB
voltage should be the same as the DAC voltage during
closed loop operation.) Then choose the R
V(DRP)
to
source enough current across R
V
(
FB
) for the desired
change in output voltage.
VV(DRP)
IOUTFL
where:
R = R
L
or R
S
for one phase;
I
OUTFL
is the full load output current.
R
CS to VDRPGain
RV(DRP)
VDRP
RV(FB)
VOUT
DESIGN EXAMPLE
Choose the component values for lossless current sensing,
adaptive positioning and current limit for a 60 A converter.
The adaptive positioning is chosen 50 mV below the
maximum V
OUT
at no load and 50 mV below the no–load
position with 60 A out. The peak output voltage transient is
100 mV max during a 60 A step current. The overcurrent
limit is nominally 75 A.
Current Sensing, Power Stage and
Output Filter Components
1. Assume 1.5 m
of output filter ESR.
R
21 k
Choose 20 k
L RL
.01 F
Choose RL
2 m
L
2 m
200 s
3. n/a
PwrstgZ
1.5 m
(VIN
(12
VOUT)
1.5)
(VOUTVIN)(F
(1.5 12) (250 k
C
25 mV)
25 mV)
.01 F
20 k
200 s
400 nH
2
.
RL
CSA Gain 3
4.2 3
2.1 m
ConverterZ
PwrstgZ
PwrstgZ
2.8 m
2.8 m
ESR
ESR
1.5 m
1.5 m
60 mV
1 m
VR
1.2 m
60 A
4.
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| CS5303GDWR28 | Analog IC |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CS5303GDWR28 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| CS5305 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Three−Phase Synchronous Switching Step−Down Controller with Single Wire Current Sharing |
| CS5305/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Three-Phase Synchronous Switching Step-Down Controller with Single Wire Current Sharing |
| CS5305GDW28 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
| CS5305GDWR28 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Three−Phase Synchronous Switching Step−Down Controller with Single Wire Current Sharing |
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