Test conditions (unless otherwise specified): TA
參數(shù)資料
型號(hào): CS4354-CSZ
廠商: Cirrus Logic Inc
文件頁數(shù): 21/24頁
文件大小: 0K
描述: IC DAC 24BIT SRL 14SOIC
特色產(chǎn)品: CS4354 Stereo D/A Converter
標(biāo)準(zhǔn)包裝: 48
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 65mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): 192k
產(chǎn)品目錄頁面: 757 (CN2011-ZH PDF)
其它名稱: 598-1808
CS4354-CSZ-ND
6
DS895F2
CS4354
DAC ANALOG CHARACTERISTICS
Test conditions (unless otherwise specified): TA = 25 °C; VA = 5 V, VL = 3.3 V; GND = 0 V; FILT+, -VFILT, and
FLYP/N capacitors as shown in Figure 5 on page 12; input test signal is a 997 Hz sine wave at 0 dBFS; measure-
ment bandwidth 20 Hz to 20 kHz.
Notes: 3.
Measured at the output of the external low-pass filter on AOUTx as shown in Figure 5 on page 12.
4.
Measured between the AOUTx and GND pins.
5.
One LSB of triangular PDF dither is added to data.
6.
Does not include attenuation due to ZOUT. Additional impedance between the AOUTx pin and the load
will lower the voltage delivered to the load.
7.
VPP is the controlling specification. VRMS specification valid for sine wave signals only.
Note that for sine wave signals:
Parameter
Symbol
Min
Typ
Max
Unit
Dynamic Performance, Fs = 48, 96, and 192 kHz (Notes 3, 5)
Dynamic range
24-bit
A-weighted
unweighted
16-bit A-weighted
unweighted
95
92
-
101
98
96
93
-
dB
Total harmonic distortion + noise
24-bit
0 dB
-20 dB
-60 dB
16-bit
0 dB
-20 dB
-60 dB
THD+N
-
-86
-78
-38
-86
-73
-33
-80
-72
-32
-
dB
Idle channel noise/signal-to-noise ratio
(A-weighted)
-
101
-
dB
Interchannel Isolation
(1 kHz)
-
100
-
dB
Analog Output (Note 4)
Full scale AOUTx output voltage
(Notes 6, 7)
0.38VA
0.40VA
0.42VA
VRMS
1.07VA
1.13VA
1.19VA
Vpp
Interchannel gain mismatch
-
0.1
-
dB
Output offset
-
±1
±8
mV
Gain drift
-
100
-
ppm/°C
Output impedance
ZOUT
-100
-
Load resistance
RL
3-
-
k
Load capacitance
CL
--
100
pF
VRMS
Vpp
22
-----------
=
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