參數(shù)資料
型號(hào)： CS4207-DNZ
廠商： Cirrus Logic Inc
文件頁(yè)數(shù)： 22/77頁(yè)
文件大小： 0K
描述： IC CODEC AUD HDPN AMP AUTO 48QFN
標(biāo)準(zhǔn)包裝： 429
類型： 音頻編解碼器
數(shù)據(jù)接口： 串行
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 2 / 3
三角積分調(diào)變： 是
動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： 105 / 110
電壓 - 電源，模擬： 2.97 V ~ 5.25 V
電壓 - 電源，數(shù)字： 2.97 V ~ 5.25 V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 48-QFN
供應(yīng)商設(shè)備封裝： 48-QFN-EP（6x6）
包裝： 托盤
其它名稱： 598-1798
DS880F4
29
CS4207
4.7
Register Settings Across Resets
The CS4207 will perform a complete Power On Reset (POR) initialization if the voltage is cycled from off to
on from the VD pin of the device. All registers will be initialized to the default state. For device behavior due
to other system reset conditions or power state transitions events, see the table below.
Setting
Action with
Link Reset
Action with
“Double”Function
Group reset
Action with
“Single” Function
Group reset
Action across
D0/D3 state
transitions or link
BITCLK stopped
Unique codec physi-
cal address (SDI)
Requires codec initial-
ization sequence to
acquire new unique
address.
Persist across
“Double” FG reset.
Persist across
“Single” FG reset.
Persist across Dx
state transitions or
BITCLK stopped.
Converter Format;
Type, Base, Mult,
Div, Bits Chan fields
(verb ID = A00/2xx)
Persist across Link
Reset.
Settings are reset to
POR default value.
PS-SettingsReset set
to ‘1’b.
Persist across
“Single” FG reset.
Persist across Dx
state transitions or
BITCLK stopped.
Amplifier Gain/Mute
(verb ID = Bxx/3xx)
Index, Mute and Gain
settings persist across
Link Reset.
Settings are reset to
POR default value.
PS-SettingsReset set
to ‘1’b.
Index, Mute and Gain
settings persist across
“Single” FG reset.
Index, Mute and Gain
settings persist across
Dx state transitions or
BITCLK stopped.
Connection Select
Control
(verb ID = F01/701)
Persist across Link
Reset.
Settings are reset to
POR default value.
PS-SettingsReset set
to ‘1’b.
Persist across
“Single” FG reset.
Persist across Dx
state transitions or
BITCLK stopped.
Power States for the
function group and
individual widgets
(verb ID = F05/705)
Power State persist
across Link Reset.
Power State persist
across “Double” FG
reset.
Power State persist
across “Single” FG
reset.
Persist across BIT-
CLK stopped. PS-Act
and PS-Set will be
updated to the cur-
rent power state
across Dx state transi-
tions.
Converter Stream &
Channel settings
e.g. Stream number
and lowest Channel
number
(verb ID = F06/706)
Reset to default by
Link reset and does
not set PS-Setting-
sReset to ‘1’b.
Reset to default by
“Double” FG reset and
does not set PS-Set-
tingsReset to ‘1’b.
Reset to default by
“Single” FG reset and
does not set PS-Set-
tingsReset to ‘1’b.
Reset to default
across Dx state transi-
tions and does not set
PS-SettingsReset to
‘1’b.
Pin Widget Controls;
In/Out Enables, Vref
(verb ID = F07/707)
Persist across Link
Reset.
Settings are reset to
POR default value.
PS-SettingsReset set
to ‘1’b.
Persist across
“Single” FG reset.
Persist across Dx
state transitions or
BITCLK stopped.
Unsolicited
Response control;
Enable and Tag
(verb ID = F08/708)
Persist across Link
Reset.
Settings are reset to
POR default value.
PS-SettingsReset set
to ‘1’b.
Persist across
“Single” FG reset.
Persist across Dx
state transitions or
BITCLK stopped.
Table 1. Register Settings Across Reset Conditions
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