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參數(shù)資料
| 型號： | CD4012 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Dual 4-Input NOR(NAND) Gate |
| 中文描述： | 雙4輸入或非（閃存）門 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 113K |
| 代理商： | CD4012 |
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
V
SS
b
0.3V to V
DD
a
0.3V
Operating Temperature Range
CD4002M, CD4012M
CD4002C, CD4012C
b
55
§
C to
a
125
§
C
b
40
§
C to
a
85
§
C
Storage Temperature Range (T
S
)
Power Dissipation (P
D
)
Dual-In-Line
Small Outline
b
65
§
C to
a
150
§
C
700 mW
500 mW
Operating Range (V
DD
)
Lead Temperature (T
L
)
(Soldering, 10 seconds)
V
SS
a
3.0V to V
SS
a
15V
260
§
C
DC Electrical Characteristics
CD4002M, CD4012M
Limits
a
25
§
C
Typ
Symbol
Parameter
Conditions
b
55
§
C
Min
a
125
§
C
Min
Units
Max
Min
Max
Max
I
DD
Quiescent
Device Current
V
DD
e
5.0V
V
DD
e
10V
V
DD
e
5.0V
V
DD
e
10V
V
DD
e
5.0V, V
I
e
V
DD
, I
O
e
0A
V
DD
e
10V, V
I
e
V
DD
, I
O
e
0A
V
DD
e
5.0V, V
I
e
V
SS
, I
O
e
0A
V
DD
e
10V, V
I
e
V
SS
, I
O
e
0A
V
DD
e
5.0V, V
O
e
3.6V, I
O
e
0A
V
DD
e
10V, V
O
e
7.2V, I
O
e
0A
V
DD
e
5.0V, V
O
e
0.95V, I
O
e
0A
V
DD
e
10V, V
O
e
2.9V, I
O
e
0A
V
DD
e
5.0V, V
O
e
0.4V, V
I
e
V
DD
V
DD
e
10V, V
O
e
0.5V, V
I
e
V
DD
0.05
0.1
0.001
0.001
0.05
0.1
3.0
6
m
A
m
A
P
D
Quiescent Device
Dissipation/Package
0.25
1.0
0.005
0.01
0.25
1.0
15
60
m
W
m
W
V
OL
Output Voltage
Low Level
0.05
0.05
0
0
0.05
0.05
0.05
0.05
V
V
V
OH
Output Voltage
High Level
4.95
9.95
4.95
9.95
5.0
10
4.95
9.95
V
V
V
NL
Noise Immunity
(All Inputs)
1.5
3.0
1.5
3.0
2.25
4.5
1.4
2.9
V
V
V
NH
Noise Immunity
(All Inputs)
1.4
2.9
1.5
3.0
2.25
4.5
1.5
3.0
V
V
I
D
N
Output Drive Current
N-Channel (4002)
(Note 2)
0.5
1.1
0.40
0.9
1.0
2.5
0.28
0.65
mA
mA
I
D
P
Output Drive Current
P-Channel (4002)
(Note 2)
V
DD
e
5.0V, V
O
e
2.5V, V
I
e
V
SS
V
DD
e
10V, V
O
e
9.5V, V
I
e
V
SS
b
0.62
b
0.62
b
0.5
b
0.5
b
2.0
b
1.0
b
0.35
b
0.35
mA
mA
I
D
N
Output Drive Current
N-Channel (4012)
(Note 2)
V
DD
e
5.0V, V
O
e
0.4V, V
I
e
V
DD
V
DD
e
10V, V
O
e
0.5V, V
I
e
V
DD
0.31
0.63
0.25
0.5
0.5
0.6
0.175
0.35
mA
mA
I
D
P
Output Drive Current
P-Channel (4012)
(Note 2)
V
DD
e
5.0V, V
O
e
2.5V, V
I
e
V
SS
V
DD
e
10V, V
O
e
9.5V, V
I
e
V
SS
b
0.31
b
0.75
b
0.25
b
0.6
b
0.5
b
1.2
b
0.175
b
0.4
mA
mA
I
I
Input Current
10
pA
Note 1:
‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2:
I
D
N and I
D
P are tested one output at a time.
2
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| CD40129BF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| CD4012A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:CMOS NAND Gates |
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