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參數(shù)資料
| 型號(hào)： | BU7345HFV |
| 元件分類： | XO, clock |
| 英文描述： | OTHER CLOCK GENERATOR, PDSO6 |
| 封裝： | SOF-6 |
| 文件頁數(shù)： | 4/5頁 |
| 文件大?。?/td> | 123K |
| 代理商： | BU7345HFV |
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Cautions on use
（
common
）
（１）
Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down
devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the
absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc.
（２）
Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics
are guaranteed under the conditions of each parameter.
（３）
Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the
reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal.
（４）
Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines.In this regard, for the digital block
power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power
supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power
supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar
manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in
order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem
including the occurrence of capacity dropout at a low temperature, thus determining the constant.
（５）
GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to
be sure no terminals are at a potential lower than the GND voltage including an actual electric transient.
（６）
Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the
ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply
or the GND terminal, the ICs can break down.
（７）
Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
（８）
Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure
to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection
process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn
OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the
assembly process and pay thorough attention to the transportation and the storage of the set PCB.
（９）
Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can
cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough
attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any
parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC.
In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within
the guaranteed value of electrical characteristics.
（１０）
Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the
small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and
voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause
fluctuations in the GND wiring pattern of external parts as well.
（１１）
External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the
nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
REV. A
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