參數(shù)資料
型號(hào)： BU-65527C3-300
廠商： DATA DEVICE CORP
元件分類： 微控制器/微處理器
英文描述： 3 CHANNEL(S), MIL-STD-1553 CONTROLLER, XMA
文件頁(yè)數(shù)： 8/32頁(yè)
文件大?。?/td> 2094K
代理商： BU-65527C3-300
16
Data Device Corporation
www.ddc-web.com
BU-65528 and BU-65527
F1 web-10/02-0
hand, makes use of a buffering structure which automatically
updates.
To implement a data wrap-around subaddress, as required by
Notice 2 of MIL-STD-1553B, the Single Message scheme should
be used for the wrap-around subaddress. Notice 2 recommends
subaddress 30 as the wrap-around subaddress.
CIRCULAR BUFFER MODE
FIGURE 6 illustrates the RT circular buffer memory management
scheme. The circular buffer mode facilitates bulk data transfers.
The size of the RT circular buffer, shown on the right side of the
figure, is programmable from 128 to 8192 words (in even powers
of 2) by the respective Subaddress Control Word. As in the sin-
gle message mode, the host processor initially loads the individ-
ual Lookup Table entries. At the start of each message, the ACE
stores the Lookup Table entry in the third position of the respec-
tive message block descriptor in the stack area of RAM, as in the
Single Message mode. The ACE transfers Receive or Transmit
Data Words to (from) the circular buffer, starting at the location
referenced by the Lookup Table pointer.
At the end of a valid (or, optionally, invalid) message, the value
of the Lookup Table entry updates to the next location after the
last address accessed for the current message. As a result, Data
Words for the next message directed to the same Tx/RX(/Bcst)
subaddress will be accessed from the next contiguous block of
address locations within the circular buffer. As a recommended
option, the Lookup Table pointers may be programmed to not
update following an invalid receive (or broadcast) message. This
allows the 1553 bus controller to retry the failed message, result-
ing in the valid (retried) data overwriting the invalid data. This
eliminates overhead for the RT's host processor. When the point-
er reaches the lower boundary of the circular buffer (located at
128, 256, . . . 8192-word boundaries in the BU-65528/27 address
space), the pointer moves to the top boundary of the circular
buffer, as FIGURE 6 shows.
IMPLEMENTING BULK DATA TRANSFERS
The use of the Circular Buffer scheme is ideal for bulk data trans-
fers; that is, multiple messages to/from the same subaddress.
The recommendation for such applications is to enable the cir-
cular buffer interrupt request. By so doing, the routine transfer of
multiple messages to the selected subaddress, including errors
and retries, is transparent to the RT's host processor. By strate-
gically initializing the subaddresses's Lookup Table pointer prior
to the start of the bulk transfer, the BU-65528/27 may be config-
ured to issue an interrupt request only after it has received the
anticipated number of valid Data Words to the designated sub-
address.
SUBADDRESS DOUBLE BUFFERING MODE
For receive (and broadcast) subaddresses, the BU-65528/27 RT
offers a third memory management option, Subaddress Double
Buffering. Subaddress Double Buffering provides a means of
ensuring data consistency. FIGURE 7 illustrates the RT
Subaddress Double Buffering scheme. Like the Single Message
and Circular Buffer modes, the Double-Buffering mode may be
selected on a subaddress basis by means of the Subaddress
Control Word. The purpose of the Double-Buffering mode is to
provide the host processor a convenient means of accessing the
most recent, valid data received to a given subaddress. This
serves to ensure the highest possible degree of data consisten-
cy by allocating two 32-bit Data Word blocks for each individual
receive (and/or broadcast) subaddress.
At a given point in time, one of the two blocks will be designated
as the “active” 1553 data block while the other will be designat-
ed as the “inactive” block. The Data Words from the next receive
message to that subaddress will be stored in the “active” block.
Upon completion of the message, provided that the message
was valid and Subaddress Double-Buffering is enabled, the BU-
65528/27 will automatically switch the “active” and “inactive”
blocks for the respective subaddress. The ACE accomplishes
this by toggling bit 5 of the subaddress's Lookup Table Pointer
and re-writing the pointer. As a result, the most recent valid block
of received Data Words will always be readily accessible to the
host processor.
As a means of ensuring data consistency, the host processor is
able to reliably access the most recent valid, received Data Word
block by performing the following sequence:
(1) Disable the Double-Buffering for the respective subaddress
by the Subaddress Control Word. That is, temporarily switch the
subaddress's memory management scheme to the Single
Message mode.
(2) Read the current value of the receive (or broadcast) subad-
dress's Lookup Table pointer. This points to the current “active”
Data Word block. By inverting bit 5 of this pointer value, it is pos-
sible to locate the start of the “inactive” Data Word block. This
block will contain the Data Words received during the most
recent valid message to the subaddress.
(3) Read out the words from the “inactive” (most recent) Data
Word Block.
(4) Re-enable the Double-Buffering mode for the respective sub-
address by the Subaddress Control Word.
RT INTERRUPTS
As in BC mode, the BU-65528/27 RT provides many maskable
interrupts. RT interrupt conditions include End of (every)
Message, Message Error, Selected Subaddress (Subaddress
Control Word) Interrupt, Circular Buffer Rollover, Selected Mode
Code Interrupt, and Stack Rollover.
DESCRIPTOR STACK
At the beginning and end of each message, the BU-65528/27 RT
stores a 4-word message descriptor in the active area stack. The
RT stack size is programmable, with choices of 256, 512, 1024,
and 2048 words. FIGURES 5, 6, and 7 show the four words:
Block Status Word, Time Tag Word, Data Block Pointer, and the
1553 received Command Word. The RT Block Status Word
includes indications of message in-progress or message com-
plete, bus channel, RT-to-RT transfer and RT-to-RT transfer
errors, message format error, loop test (self-test) failure, circular
buffer rollover, illegal command, and other error conditions.
TABLE 30 shows the bit mapping of the RT Block Status Word.
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