參數(shù)資料
型號: BU-62864B4-150
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, BGA128
封裝: 0.815 X 0.815 INCH, 0.140 INCH HEIGHT, 1 MM PITCH, BGA-128
文件頁數(shù): 49/93頁
文件大?。?/td> 504K
代理商: BU-62864B4-150
Data Device Corporation
62743_pre2.DOC
www.ddc-web.com
8-15-01
53
The purpose of the subaddress double buffering mode is to provide data sample
consistency to the host processor. This is accomplished by allocating two 32-word
data word blocks for each individual receive (and/or broadcast receive)
subaddress. At any given time, one of the blocks will be designated as the “active
“1553 block while the other will be considered as “inactive”. The data words for the
next receive command to that subaddress will be stored in the active block.
Following receipt of a valid message, the PCI Enhanced Mini-ACE will
automatically switch the active and inactive blocks for that subaddress. As a result,
the latest, valid, complete data block is always accessible to the host processor.
Figure 7. RT Double Buffered Mode
CIRCULAR BUFFER MODE
The operation of the PCI Enhanced Mini-ACE’s circular buffer RT memory
management mode is illustrated in Figure 8. As in the single buffered and double
buffered modes, the individual lookup table entries are initially loaded by the host
processor. At the start of each message, the lookup table entry is stored in the
third position of the respective message block descriptor in the descriptor stack
area of RAM. Receive or transmit data words are transferred to (from) the circular
buffer, starting at the location referenced by the lookup table pointer.
In general, the location after the last data word written or read (modulo the circular
buffer size) during the message is written to the respective lookup table location
during the end-of-message sequence. By so doing, data for the next message for
the respective transmit, receive(/broadcast), or broadcast subaddress will be
accessed from the next lower contiguous block of locations in the circular buffer.
15
13
0
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND
WORD
CONFIGURATION
REGISTER
STACK
POINTERS
DESCRIPTOR
STACK
CURRENT
AREA B/A
DATA
BLOCKS
DATA
BLOCK 1
DATA
BLOCK 0
X..X 0 YYYYY
X..X 1 YYYYY
RECEIVE DOUBLE
BUFFER ENABLE
SUBADDRESS
CONTROL WORD
MSB
DATA BLOCK POINTER
LOOK-UP
TABLES
相關(guān)PDF資料
PDF描述
BU-65142D2-110W 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP78
BU-65142D2-140W 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP78
BU-65142F2-190W 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP78
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