參數(shù)資料
型號: BSH102
廠商: NXP SEMICONDUCTORS
元件分類: 小信號晶體管
英文描述: N-channel enhancement mode MOS transistor
中文描述: 850 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: PLASTIC, SMD, 3 PIN
文件頁數(shù): 3/12頁
文件大?。?/td> 96K
代理商: BSH102
1997 Dec 08
3
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH102
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Notes
1.
2.
3.
4.
T
s
is the temperature at the soldering point of the drain lead.
Pulse width and duty cycle limited by maximum junction temperature.
Device mounted on printed-circuit board with an R
th a-tp
(ambient to tie-point) of 27.5 K/W.
Device mounted on printed-circuit board with an R
th a-tp
(ambient to tie-point) of 90 K/W.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
V
GS
I
D
I
DM
P
tot
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
peak drain current
total power dissipation
55
55
30
±
20
0.85
3.4
0.5
0.75
0.54
+150
+150
V
V
A
A
W
W
W
°
C
°
C
T
s
= 80
°
C; note 1
note 2
T
s
= 80
°
C
T
amb
= 25
°
C; note 3
T
amb
= 25
°
C; note 4
T
stg
T
j
storage temperature
operating junction temperature
Source-drain diode
I
S
I
SM
source current (DC)
peak pulsed source current
T
s
= 80
°
C
note 2
0.5
2
A
A
Fig.2 Power derating curve.
handbook, halfpage
0
40
80
160
0.2
0
0.4
MGM190
120
Ptot
(W)
TS (
°
C)
Fig.3 SOAR.
δ
= 0.01; T
s
= 80
°
C.
(1) R
DSon
limitation.
handbook, halfpage
IDS
(A)
MGM210
1
1
10
10
3
10
2
10
1
10
2
10
1
VDS (V)
tp
T
P
t
tp
T
δ
=
DC
(1)
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