參數(shù)資料
型號: AX88180
廠商: ASIX Electronics Corporation
英文描述: High-Performance Non-PCI 32-bit 10/100/1000M Gigabit Ethernet Controller
中文描述: 高性能非PCI 32位10/100/1000千兆以太網(wǎng)控制器
文件頁數(shù): 20/47頁
文件大?。?/td> 420K
代理商: AX88180
AX88180
20
ASIX ELECTRONICS CORPORATION
4.9 TXDES2--TX Descriptor2 Register
Offset Address = 0xFC28 Default = 0x0000_0000
Field
Name
Type
Default
31:16
-
R
All 0’s
15
TXD2_EN
R/W
0
Description
Reserved
Transmit TX descriptor 2
If this bit is enabled, MAC will begin to transmit data that are stored in TX
buffer. In former, driver had already written data that is assigned to TX
descriptor2 to TX buffer. This bit will be cleared by hardware when MAC
finished the transmission.
1= enable
0= disable
Reserved
TX packet length (unit: byte)
Driver set this field to indicate AX88180 how many bytes will be
transmitted.
14:13
12:0
-
R
R/W
00
All 0’s
TXD2_LEN
4.10 TXDES3--TX Descriptor3 Register
Offset Address = 0xFC2C Default = 0x0000_0000
Field
Name
Type
Default
31:16
-
R
All 0’s
15
TXD3_EN
R/W
0
Description
Reserved
Transmit TX descriptor 3
If this bit is enabled, MAC will begin to transmit data that are stored in TX
buffer. In former, driver had already written data that is assigned to TX
descriptor3 to TX buffer. This bit will be cleared by hardware when MAC
finished the transmission.
1= enable
0= disable
Reserved
TX Packet Length (unit: byte)
Driver set this field to indicate AX88180 how many bytes will be
transmitted.
14:13
12:0
-
R
R/W
00
All 0’s
TXD3_LEN
4.11 RX_CFG--RX Configuration Register
Offset Address = 0xFC30 Default = 0x0000_0101
Field
Name
Type
Default
31:9
-
R
All 0’s
8
RXBME
R/W
1
Description
Reserved
RX Buffer Monitor Enable
When this bit is enabled, MAC will monitor the status of receive buffer.
1 = enable
0 = disable
Reserved.
RX Packet TCP/IP Checksum
When this bit is set, AX88180 will check the checksum of the received
packet that is IP, TCP or UDP packet. If there is checksum error, AX88180
will drop the packet and RXCHKSUMCNT counter will add 1.
1 = enable
0 = disable
Reserved
RX Buffer Protection
When this bit is enabled, MAC will protect the RX buffer to avoid overrun.
For normal operation, this bit should be enabled in initial stage.
1= enable
0= disable
7:5
4
-
R/W
R/W
000
0
RXCHKSUM
3:1
0
-
R/W
R/W
000
1
RXBUFPRO
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