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ASIX ELECTRONICS CORPORATION
15
AX88772A/AX88172A
Low-pin-count
USB 2.0 to 10/100M Fast Ethernet Controller
FDX_LED
O5
18
Full Duplex and collision detected
LED indicator. This pin drives low when
the Ethernet PHY is in full-duplex mode and drives high when in half
duplex mode. When in half duplex mode and the Ethernet PHY detects
collision, it will be driven low (or blinking).
Ethernet speed LED indicator. This pin drives low when the Ethernet PHY
is in 100BASE-TX mode and drives high when in 10BASE-T mode.
Misc. Pins
Chip reset input. Active low. This is the external reset source used to reset
this chip. This input feeds to the internal power-on reset circuitry, which
provides the main reset source of this chip. After completing reset,
EEPROM data will be loaded automatically.
Remote-wakeup trigger from external pin. EXTWAKEUP_N should be
asserted low for more than 2 cycles of 12MHz clock to be effective.
General Purpose Input/ Output Pin 2.
General Purpose Input/ Output Pin 1. This pin is default as input pin after
power-on reset. This pin is also for Default WOL Ready Mode setting;
please refer to section
2.3
Settings.
General Purpose Input/ Output Pin 0 or PME (Power Management Event).
This pin is default as input pin after power-on reset. GPIO_0 also can be
defined as PME output to indicate wake up event detected. Please refer to
section
2.3
Settings.
UART_RX or SPI_MISO. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
2.3
Settings.
UART_TX or SPI_MOSI. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
2.3
Settings.
I2C_SDA or SPI_SS. This is a multi-function pin determined by EEPROM
Flag [1] setting. Please refer to section
2.3
Settings.
I2C_SCLK or SPI_SCLK. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
2.3
Settings.
USB Speed indicator: When USB bus is in Full speed, this pin drives high
continuously. When USB bus is in High speed, this pin drives low
continuously. This pin drives high and low in turn (blinking) to indicate TX
data transfer going on whenever the host controller sends bulk out data
transfer.
Test pin. For normal operation, user should connect to ground.
Test pin. For normal operation, user should connect to ground.
Test pin. For normal operation, user should keep this pin NC.
Test pin. For normal operation, user should keep this pin NC.
Test pin. For normal operation, user should keep this pin NC.
On-chip Regulator Pins
3.3V Power supply to on-chip 3.3V to 1.8V voltage regulator.
Ground pin of on-chip 3.3V to 1.8V voltage regulator.
1.8V voltage output of on-chip 3.3V to 1.8V voltage regulator.
Power and Ground Pins
13, 14, 21, 25,
33, 47, 50
17, 41, 49
Digital I/O Power. 3.3V.
15, 16, 23, 34,
45, 46, 60
53
Analog Power for USB transceiver. 3.3V.
54
Analog Ground for USB transceiver.
58
Analog Power for USB PLL. 3.3V.
59
Analog Ground for USB PLL.
2
Analog Power for Ethernet PHY bandgap. 3.3V.
3
Analog Ground for Ethernet PHY.
6, 61
Analog Power for Ethernet PHY and 25Mhz crystal oscillator.
1.8V.
SPEED_LED
O5
19
RESET_N
I5/PU/S
42
EXTWAKEUP_N
I5/PU/S
24
GPIO_2
GPIO_1
B5/PD
B5/PD
26
27
GPIO_0/PME
B5/PD
28
SI_3
B5/PU
29
SI_2
B5/PU
30
SI_1
B5/PU
31
SI_0
B5/PU
32
USB_LED
O5
22
TEST0
TEST1
TCLK_EN
TCLK_0
TCLK_1
I5/S
I5/S
I5/PD/S
I5/PD
I5/PD
44
43
40
39
38
VCC3R3
GND3R3
V18F
P
P
P
11
12
10
VCCK
P
Digital Core Power. 1.8V.
VCC3IO
GND
P
P
Digital Ground.
VCC33A_H
GND33A_H
VCC33A_PLL
GND33A_PLL
VCC3A3
GND3A3
VCC18A
P
P
P
P
P
P
P