參數(shù)資料
型號: ATTINY2313A-SUR
廠商: Atmel
文件頁數(shù): 112/172頁
文件大?。?/td> 0K
描述: MCU AVR 2KB FLASH 20MHZ 20SOIC
產(chǎn)品培訓(xùn)模塊: tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 1,000
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 18
程序存儲器容量: 2KB(1K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 128 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 帶卷 (TR)
其它名稱: ATTINY2313A-SUR-ND
44
8246B–AVR–09/11
ATtiny2313A/4313
Safety Level 2
In this mode, the Watchdog Timer is always enabled, and the WDE bit will always read as
one. A timed sequence is needed when changing the Watchdog Time-out period. To change
the Watchdog Time-out, the following procedure must be followed:
a.
In the same operation, write a logical one to WDCE and WDE. Even though the
WDE always is set, the WDE must be written to one to start the timed sequence
b.
Within the next four clock cycles, in the same operation, write the WDP bits as
desired, but with the WDCE bit cleared. The value written to the WDE bit is
irrelevant
8.4.2
Code Example
The following code example shows one assembly and one C function for turning off the WDT.
The example assumes that interrupts are controlled (e.g., by disabling interrupts globally) so that
no interrupts will occur during execution of these functions.
Note:
Assembly Code Example
WDT_off:
wdr
; Clear WDRF in MCUSR
ldi
r16, (0<<WDRF)
out
MCUSR, r16
; Write logical one to WDCE and WDE
; Keep old prescaler setting to prevent unintentional Watchdog Reset
in
r16, WDTCSR
ori
r16, (1<<WDCE)|(1<<WDE)
out
WDTCSR, r16
; Turn off WDT
ldi
r16, (0<<WDE)
out
WDTCSR, r16
ret
C Code Example
void
WDT_off(void)
{
_WDR();
/* Clear WDRF in MCUSR */
MCUSR = 0x00;
/* Write logical one to WDCE and WDE */
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Turn off WDT */
WDTCSR = 0x00;
}
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