參數(shù)資料
型號: ATF22LV10C-15SI
廠商: Atmel
文件頁數(shù): 18/19頁
文件大小: 0K
描述: IC PLD EE 15NS 24-SOIC
標準包裝: 31
系列: 22V10
可編程類型: EE PLD
宏單元數(shù): 10
輸入電壓: 3.3V
速度: 15ns
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC W
包裝: 管件
其它名稱: ATF22LV10C15SI
8
0780M–PLD–7/10
Atmel ATF22LV10C
9.
Compiler Mode Selection
Table 9-1.
Compiler Mode Selection
Note:
1. These device types will create a JEDEC file which when programmed in an Atmel ATF22V10C device will enable
the power-down mode feature. All other devices have this feature disabled.
10.
Functional Logic Diagram Description
The functional logic diagram describes the Atmel ATF22LV10C architecture.
The ATF22LV10C has twelve inputs and ten I/O macrocells. Each macrocell can be configured into one of four
output configurations: active high/low, registered/combinatorial output.The universal architecture of the
ATF22LV10C can be programmed to emulate most 24-pin PAL devices.
Unused product terms are automatically disabled by the compiler to decrease power consumption. A security fuse,
when programmed, protects the contents of the ATF22LV10C. Eight bytes (64-fuses) of User Signature are
accessible to the user for purposes such as storing project name, part number, revision or date. The User
Signature is accessible regardless of the state of the security fuse.
PAL Mode
(5828 Fuses)
GAL Mode
(5892 Fuses)
Power-down Mode(1)
(5893 Fuses)
Synario
Atmel ATF22C10C (DIP)
Atmel ATF22V10C (PLCC)
Atmel ATF22C10C DIO (UES)
Atmel ATF22V10C PLCC (UES)
Atmel ATF22C10C DIP (PWD)
Atmel ATF22C10V PLCC (PWD)
WINCUPL
P22V10
P22V10LCC
G22V10
G22V10LCC
G22V10CP
G22V10CPLCC
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