參數(shù)資料
型號: ATF1502BE-5AX44
廠商: Atmel
文件頁數(shù): 23/24頁
文件大?。?/td> 0K
描述: IC CPLD 64MC 1.8V 44-TQFP
標準包裝: 160
系列: ATF15xx
可編程類型: 系統(tǒng)內(nèi)可編程(最少 10,000 次編程/擦除循環(huán))
最大延遲時間 tpd(1): 7.0ns
電壓電源 - 內(nèi)部: 1.7 V ~ 1.9 V
宏單元數(shù): 32
輸入/輸出數(shù): 32
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-TQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 托盤
配用: ATF15XX-DK3-ND - KIT DEV FOR ATF15XX CPLD'S
8
3492A–PLD–12/05
ATF1502BE
5.
Programming Methods
The ATF1502BE devices are In-System Programmable (ISP) or In-System Configurable (ISC)
devices utilizing the 4-pin JTAG protocol. This capability eliminates package handling normally
required for programming and facilitates rapid design iterations and field changes.
When using the ISP hardware or software to program the ATF1502BE devices, four I/O pins
must be reserved for the JTAG interface. However, the logic features that the macrocells have
associated with these I/O pins are still available to the design for buried logic functions.
To facilitate ISP programming by the Automated Test Equipment (ATE) vendors, Serial Vector
Format (SVF) files can be created by Atmel-provided software utilities. ATF1502BE devices can
also be programmed using standard third-party programmers. With a third-party programmer,
the JTAG ISP port can be disabled, thereby allowing four additional I/O pins to be used for logic.
The AT1502BE device supports several configuration modes which gives designers several
unique options for programming.
The different modes of programming are:
ISC – In System Configuration
OTF – On-the-Fly Reconfiguration
DRA – Direct Reconfiguration Access
5.1
In-System Configuration – ISC (Also Referred to as ISP)
This mode is the de-facto standard used to program the CPLD when it is attached to a PCB. The
term ISC can also be used interchangeably with ISP (In-system Programming). ISC or ISP elim-
inates the need for an external device programmer, and the devices can be soldered to a PCB
without being preprogrammed.
In the ISC mode, the logic operation of the ATF1502BE is halted and the embedded configura-
tion memory is programmed. The device is programmed by first erasing the configuration
memory in the CPLD and loading the new configuration data into the memory, which in-turn con-
figures the PLD for functional mode. When the device is in the ISC programming mode, all user
I/Os are held in the high impedance state.
The ISC mode is best suited for working with the ATF1502BE device in a design development or
production environment. Configuration of the ATF1502BE device done via a Download Cable
(see Figure 5-1 on page 8) is the default mode used to program the device in the ISC mode. In
this mode, the PC is typically the controlling device that communicates with the CPLD.
Figure 5-1.
Configuration of ATF1502BE Device Using a Download Cable
TCK
TDO
TMS
TDI
ATF1502BE
CPLD Device
2
4
6
8
10
1
3
5
7
9
VCC
JTAG
Connector
Connect
ISP Download
Cable to 10-pin
JTAG Header
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