參數資料
| 型號： | ATF1502BE-5AX44 |
| 廠商： | Atmel |
| 文件頁數： | 22/24頁 |
| 文件大小： | 0K |
| 描述： | IC CPLD 64MC 1.8V 44-TQFP |
| 標準包裝： | 160 |
| 系列： | ATF15xx |
| 可編程類型： | 系統內可編程（最少 10,000 次編程/擦除循環(huán)） |
| 最大延遲時間 tpd(1)： | 7.0ns |
| 電壓電源 - 內部： | 1.7 V ~ 1.9 V |
| 宏單元數： | 32 |
| 輸入/輸出數： | 32 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-TQFP |
| 供應商設備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤 |
| 配用： | ATF15XX-DK3-ND - KIT DEV FOR ATF15XX CPLD'S |
7
3492A–PLD–12/05
ATF1502BE
2.1
Schmitt Trigger
The Input Buffer of each input and I/O pin has an optional schmitt trigger setting. The schmitt
trigger option can be used to buffer inputs with slow rise times.
3.
Speed/Power Management
Unlike conventional CPLDs with sense amplifiers, the ATF1502BE is designed using low-power
full CMOS design techniques. This enables the ATF1502BE to achieve extremely low power
consumption over the full operating frequency spectrum.
The ATF1502BE also has an optional power-down mode. In this mode, current drops to below
100 A. When the power-down option is selected, either PD1 or PD2 pins (or both) can be used
to power down the part. When enabled, the device goes into power-down when either PD1 or
PD2 is high. In the power-down mode, all internal logic signals are latched and held, as are any
enabled outputs.
All pin transitions are ignored until the PD pin is brought low. When the power-down feature is
enabled, the PD1 or PD2 pin cannot be used as a logic input or output. However, the pin’s mac-
rocell may still be used to generate buried foldback and cascade logic signals.
All power-down AC characteristic parameters are computed from external input or I/O pins.
3.1
Output Drive Capability
Each output has a high/low drive option. The low drive option (slow slew rate) can be used to
reduce system noise by slowing down outputs that do not need to operate at maximum speed or
drive strength. Outputs default to high drive strength by Atmel software and can be set to low
drive strength through the slew rate option.
4.
Security Feature
A fuse is provided to prevent unauthorized copying of the ATF1502BE fuse patterns. Once pro-
grammed, fuse verify is inhibited. However, the 16-bit User Signature remains accessible. To
reset this feature, the entire memory array in the device must be erased.
相關PDF資料 |
PDF描述 |
|---|---|
| ATF1504ASVL-20QI100 | IC CPLD 20NS LOWV LOWPWR 100QPFP |
| ATF1504BE-5AX100 | IC CPLD 64MC 1.8V 100-TQFP |
| ATF1508ASL-25QI160 | IC CPLD 25NS LOW PWR 160PQFP |
| ATF1508ASVL-20JU84 | IC CPLD 20NS LOWV LOW PWR 84PLCC |
| ATF1508BE-5AX100 | IC CPLD 128MC 1.8V ISP 100TQFP |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ATF1502BE-7AU44 | 功能描述:CPLD - 復雜可編程邏輯器件 32 MC CPLD 1.8V ISP RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ATF1502SE | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Family Datasheet |
| ATF1502SE(L) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATF1502/04/08/16SE(L) Preliminary [Updated 9/02. 69 Pages] Second Generation Industry Compatible 5V Logic Doubling CPLDs 32-512 Macrocells. standard & low power w/ISP |
| ATF1502SE-10 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Family Datasheet |
| ATF1502SE-5 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Family Datasheet |
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