參數(shù)資料
型號(hào): AT89S4051-24SU
廠商: Atmel
文件頁(yè)數(shù): 46/46頁(yè)
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 4K LF 20SOIC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 38
系列: 89S
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM
輸入/輸出數(shù): 15
程序存儲(chǔ)器容量: 4KB(4K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
其它名稱: Q2962974
9
3390E–MICRO–6/08
AT89S2051/S4051
10.2
Brown-out Reset
The AT89S2051/S4051 has an on-chip Brown-out Detection (BOD) circuit for monitoring the V
CC
level during operation by comparing it to a fixed trigger level. The trigger level for the BOD is
nominally 2.0V. The purpose of the BOD is to ensure that if V
CC fails or dips while executing at
speed, the system will gracefully enter reset without the possibility of errors induced by incorrect
execution. When V
CC decreases to a value below the trigger level, the Brown-out Reset is imme-
diately activated. When V
CC increases above the trigger level, the BOD delay counter starts the
microcontroller after the timeout period has expired in approximately 2 ms.
10.3
External Reset
The RST pin functions as an active-high reset input. The pin must be held high for at least two
machine cycles to trigger the internal reset. RST also serves as the In-System Programming
(ISP) enable input. ISP mode is enabled when the external reset pin is held high and the ISP
Enable fuse is set.
11. Clock Register
.
Table 11-1.
CLKREG
– Clock Register
CLKREG = 8FH
Reset Value = XXXX XX0XB
Not Bit Addressable
––
–––
PWDEX
X2
Bit
7
6
543
21
0
Symbol
Function
PWDEX
Power-down Exit Mode. When PWDEX = 1, wake up from Power-down is externally controlled. When PWDEX = 0, wake
up from Power-down is internally timed.
X2
When X2 = 0, the frequency (at XTAL1 pin) is internally divided by 2 before it is used as the device system frequency.
When X2 = 1, the divide by 2 is no longer used and the XTAL1 frequency becomes the device system frequency. This
enables the user to use a 6 MHz crystal instead of a 12 MHz crystal in order to reduce EMI. The X2 bit is initialized on
power-up with the value of the X2 user fuse and may be changed at runtime by software.
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