參數(shù)資料
型號(hào): AT89S4051-24SU
廠商: Atmel
文件頁(yè)數(shù): 44/46頁(yè)
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 4K LF 20SOIC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 38
系列: 89S
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM
輸入/輸出數(shù): 15
程序存儲(chǔ)器容量: 4KB(4K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
其它名稱: Q2962974
7
3390E–MICRO–6/08
AT89S2051/S4051
8.
Restrictions on Certain Instructions
The AT89S2051/S4051 is an economical and cost-effective member of Atmel’s family of micro-
controllers. It contains 2K/4K bytes of Flash program memory. It is fully compatible with the
MCS-51 architecture, and can be programmed using the MCS-51 instruction set. However,
there are a few considerations one must keep in mind when utilizing certain instructions to pro-
gram this device.
All the instructions related to jumping or branching should be restricted such that the destination
address falls within the physical program memory space of the device, which is 2K/4K for the
AT89S2051/S4051. This should be the responsibility of the software programmer. For example,
LJMP 7E0H would be a valid instruction for the AT89S2051 (with 2K of memory), whereas LJMP
900H would not.
8.1
Branching Instructions
LCALL, LJMP, ACALL, AJMP, SJMP, JMP @A+DPTR. These unconditional branching
instructions will execute correctly as long as the programmer keeps in mind that the destination
branching address must fall within the physical boundaries of the program memory size (loca-
tions 00H to 7FFH/FFFH for the AT89S2051/S4051). Violating the physical space limits may
cause unknown program behavior.
CJNE [...], DJNZ [...], JB, JNB, JC, JNC, JBC, JZ, JNZ. With these conditional branching
instructions, the same rule above applies. Again, violating the memory boundaries may cause
erratic execution.
For applications involving interrupts, the normal interrupt service routine address locations of the
80C51 family architecture have been preserved.
8.2
MOVX-related Instructions, Data Memory
The AT89S2051/S4051 contains 256 bytes of internal data memory. External DATA memory
access is not supported in this device, nor is external PROGRAM memory execution. Therefore,
no MOVX [...] instructions should be included in the program.
A typical 80C51 assembler will still assemble instructions, even if they are written in violation of
the restrictions mentioned above. It is the responsibility of the user to know the physical features
and limitations of the device being used and adjust the instructions used accordingly.
9.
Program Memory Lock Bits
On the chip are two lock bits which can be left unprogrammed (U) or can be programmed (P) to
obtain the additional features listed in Table 9-1:
Note:
1. The Lock Bits can only be erased with the Chip Erase operation.
Table 9-1.
Lock Bit Protection Modes
Program Lock Bits
LB1
LB2
Protection Type
1
U
No program lock features.
2
P
U
Further programming of the Flash is disabled.
3
P
Same as mode 2, also verify is disabled.
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