參數(shù)資料
型號: AT89EB5114-TGSIL
廠商: Atmel
文件頁數(shù): 19/86頁
文件大小: 0K
描述: IC 8051 MCU FLASH 4K 20SOIC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 38
系列: 89EB
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 11
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 616 (CN2011-ZH PDF)
26
AT89/83EB5114
4311C–8051–02/08
Figure 9. Timer/Counter x (x = 0 or 1) in Mode 2
Mode 3 (Two 8-bit Timers)
Mode 3 configures Timer 0 so that registers TL0 and TH0 operate as 8-bit Timers (see
Figure 10). This mode is provided for applications requiring an additional 8-bit Timer or
Counter. TL0 uses the Timer 0 control bits C/T0# and GATE0 in the TMOD register, and
TR0 and TF0 in the TCON register in the normal manner. TH0 is locked into a Timer
function (counting FUART) and takes over use of the Timer 1 interrupt (TF1) and run con-
trol (TR1) bits. Thus, operation of Timer 1 is restricted when Timer 0 is in mode 3.
Figure 10. Timer/Counter 0 in Mode 3: Two 8-bit Counters
Timer 1
Timer 1 is identical to Timer 0 except for Mode 3 which is a hold-count mode. The fol-
lowing comments help to understand the differences:
Timer 1 functions as either a Timer or an event Counter in the three operating
modes. Figure 7 to Figure 9 show the logical configuration for modes 0, 1, and 2.
Mode 3 of Timer 1 is a hold-count mode.
Timer 1 is controlled by the four high-order bits of the TMOD register (see Figure 16)
and bits 2, 3, 6 and 7 of the TCON register (see Figure 15). The TMOD register
selects the method of Timer gating (GATE1), Timer or Counter operation (C/T1#)
and the operating mode (M11 and M01). The TCON register provides Timer 1
control functions: overflow flag (TF1), run control bit (TR1), interrupt flag (IE1) and
the interrupt type control bit (IT1).
Timer 1 can serve as the Baud Rate Generator for the Serial Port. Mode 2 is best
suited for this purpose.
TRx
TCON reg
TFx
TCON reg
0
1
GATEx
TMOD reg
Overflow
Timer x
Interrupt
Request
C/Tx#
TMOD reg
TLx
(8 bits)
THx
(8 bits)
INTx#
Tx
FCkIdle
/ 6
TR0
TCON.4
TF0
TCON.5
INT0#
0
1
GATE0
TMOD.3
Overflow
Timer 0
Interrupt
Request
C/T0#
TMOD.2
TL0
(8 bits)
TR1
TCON.6
TH0
(8 bits)
TF1
TCON.7
Overflow
Timer 1
Interrupt
Request
T0
FCkIdle
/ 6
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