參數(shù)資料
型號: AT89C4051-24SJ
廠商: Atmel
文件頁數(shù): 17/19頁
文件大?。?/td> 0K
描述: IC MCU 4K FLASH 24MHZ 20-SOIC
標準包裝: 37
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: UART/USART
外圍設備: 欠壓檢測/復位,LED,POR
輸入/輸出數(shù): 15
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
7
1001F–MICRO–6/08
AT89C4051
9.
Idle Mode
In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The
mode is invoked by software. The content of the on-chip RAM and all the special functions regis-
ters remain unchanged during this mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset.
P1.0 and P1.1 should be set to “0” if no external pullups are used, or set to “1” if external
pullups are used.
It should be noted that when idle is terminated by a hardware reset, the device normally
resumes program execution, from where it left off, up to two machine cycles before the internal
reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but
access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a
port pin when Idle is terminated by reset, the instruction following the one that invokes Idle
should not be one that writes to a port pin or to external memory.
10. Power-down Mode
In the power-down mode the oscillator is stopped and the instruction that invokes power-down is
the last instruction executed. The on-chip RAM and Special Function Registers retain their val-
ues until the power-down mode is terminated. The only exit from power-down is a hardware
reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be
activated before V
CC is restored to its normal operating level and must be held active long
enough to allow the oscillator to restart and stabilize.
P1.0 and P1.1 should be set to “0” if no external pullups are used, or set to “1” if external
pullups are used.
11. Brown-out Detection
When V
CC drops below the detection threshold, all port pins (except P1.0 and P1.1) are weakly
pulled high. When V
CC goes back up again, an internal Reset is automatically generated after a
delay of typically 15 msec. The nominal brown-out detection threshold is 2.1V ± 10%.
VCC
2.1V
PORT PIN
INTERNAL RESET
15 msec.
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