參數(shù)資料
型號: AT80C51RD2-RLRUM
廠商: Atmel
文件頁數(shù): 27/81頁
文件大?。?/td> 0K
描述: IC MCU 80C51 HI PERFORM 44VQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標準包裝: 1
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器類型: ROMless
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LQFP
包裝: 標準包裝
其它名稱: AT80C51RD2-RLRUMDKR
33
4113D–8051–01/09
AT80C51RD2
Figure 10-6. PCA PWM Mode
10.5
PCA Watchdog Timer
An on-board watchdog timer is available with the PCA to improve the reliability of the system
without increasing chip count. Watchdog timers are useful for systems that are susceptible to
noise, power glitches, or electrostatic discharge. Module 4 is the only PCA module that can be
programmed as a watchdog. However, this module can still be used for other modes if the
watchdog is not needed. Figure 10-4 shows a diagram of how the watchdog works. The user
pre-loads a 16-bit value in the compare registers. Just like the other compare modes, this 16-bit
value is compared to the PCA timer value. If a match is allowed to occur, an internal reset will be
generated. This will not cause the RST pin to be driven high.
In order to hold off the reset, the user has three options:
1.
Periodically change the compare value so it will never match the PCA timer.
2.
Periodically change the PCA timer value so it will never match the compare values.
3.
Disable the watchdog by clearing the WDTE bit before a match occurs and then re-
enable it.
The first two options are more reliable because the watchdog timer is never disabled as in option
#3. If the program counter ever goes astray, a match will eventually occur and cause an internal
reset. The second option is also not recommended if other PCA modules are being used.
Remember, the PCA timer is the time base for all modules; changing the time base for other
modules would not be a good idea. Thus, in most applications the first solution is the best option.
This watchdog timer won’t generate a reset out on the reset pin.
CL
CCAPnH
CCAPnL
ECOMn
CCAPMn, n= 0 to 4
0xDA to 0xDE
CAPNn MATn TOGn PWMn ECCFn
CAPPn
8-Bit Comparator
CEXn
“0”
“1”
Enable
PCA Counter/Timer
Overflow
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