參數(shù)資料
型號: ASM4SSTVF16857-48VT
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: DDR 14-Bit Registered Buffer
中文描述: SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48
封裝: 0.173 INCH, 0.40 MM PITCH, TVSOP-48
文件頁數(shù): 3/16頁
文件大?。?/td> 147K
代理商: ASM4SSTVF16857-48VT
August 2004
ASM4SSTVF16857
rev 2.0
DDR 14-Bit Registered Buffer
3 of 16
Pin Descriptions
Pin #
Pin Name
Type
Description
1, 2, 5, 6, 7, 10, 11, 14, 15, 18, 19, 20, 23, 24
Q (14:1)
O
Data output.
3, 8, 13, 17, 22, 27, 36, 46
GND
P
Ground to entire chip.
4, 9, 12, 16, 21
VDDQ
P
Output supply voltage.
25, 26, 29, 30, 31, 32, 33, 40, 41, 42, 43, 44, 47, 48
D(14:1)
I
Data input.
38
CLK
I
Positive clock input.
39
CLKB
I
Negative clock input.
28, 37, 45
VDD
P
Core supply voltage.
34
RESETB
I
Rest Active low.
35
VREF
I
Input reference voltage.
Truth Table
1
Inputs
Q Outputs
RESETB
CLK
CLKB
D
Q
L
X or floating
X or floating
X or floating
L
H
H
H
H
L
L
H
L or H
L or H
X
Q
0
2
Note:
1. H=High signal level, L=Low signal level, = transition from low to high, = transition from high to low, X = don’t care
2. Output level before the indicated steady state input conditions were established.
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