參數(shù)資料
型號(hào)： AS8530-ASOT-002-500
廠商： ams
文件頁(yè)數(shù)： 17/33頁(yè)
文件大?。?/td> 0K
描述： IC TXRX LIN COMPANION 8-SOIC
標(biāo)準(zhǔn)包裝： 500
系列： *
Revision 1.1
23 - 32
AS8530
Datasheet - Application In form atio n
8.7 Serial Port Interface
The interface is essentially used to trigger the window watchdog, to access test mode and read out diagnostic information for the AS8530. The
description of this interface and the protocol is explained below. Information on block status and errors can be displayed by diagnosis registers.
8.7.1 Device Configuration using 2-Wire Serial Port
The AS8530 device configuration register is programmed via a 2-wire Serial Programming Interface. EN/SCL is used as Serial Clock and TX/
SDA_IO is used as Serial Data. EN is used as clock input to access serial port registers in serial port mode. Also EN is used to control transition
from normal mode to standby/sleep mode. The TX input of the device will be multiplexed as following:
LIN TX for transmitting data from microcontroller on LIN bus
SDA_IO for Serial data input/output, this will be used for serially accessing data from configuration and status register
SP Frame. A frame is formed by first byte for command and address/configuration and following bit stream that can be formed by an integer
number of bytes. Command is coded RD/WR on the first bits, length of the transfer is indicated by LEN1, LEN2 bits while address is given on
LSB 5 bits.
Write Command. For Write command RD/WR = 0
After the command code, length of the transfer is send in next two bits, the address of register to be written has to be provided from the MSB to
the LSB. Then one, two, four, or eight data bytes can be transferred from the MSB to the LSB. For each data byte following the first one, used
address is the incremented value of the previously written address. Each bit of the frame has to be driven by the 2-Wire SP master on the SP
clock (EN pin) positive edge and the 2-Wire SP slave (device) samples this bit on the next SP clock (EN pin) negative edge. In the following
figures two examples of write command (without and with address self-increment).
Figure 14. Protocol for Serial Data Write with Length = 1
Table 6. Command Bits
Command Bits
Register Address or Transmission Configuration
RD/WR
LEN1
LEN2
A4
A3
A2
A1
A0
RD/WR
Command
<A4:A0>
Description
0
WRITE
ADDRESS
Writes data byte on the given starting address.
1
READ
ADDRESS
Read data byte from the given starting address.
Table 7. Transfer Length
LEN1
LEN2
Length
Description
001
Transfer consists of single Data phase. After completion of single Data phase device comes out of Serial
port interface.
012
Transfer consist of two Data phase.
104
Transfer consist of four Data phase.
118
Transfer consist of eight Data phase.
EN
TX
0
LEN1 LEN0
A4
A0
A1
A2
A3
D0
D1
D2
D3
D4
D5
D7
D6
Transfer edge
Sampling edge
Data D7 – D0 is moved
to Address A4..A0 here
LEN1 = 0 LEN0 = 0
Command & Address Phase
Data Phase
Length of Transaction = 1
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