參數(shù)資料
型號(hào): AS3510-T
廠商: ams
文件頁數(shù): 19/20頁
文件大小: 0K
描述: IC CODEC AFE ANALOG 49-CABGA
標(biāo)準(zhǔn)包裝: 2,250
類型: 音頻編解碼器
應(yīng)用: 便攜式音頻,電話
安裝類型: 表面貼裝
封裝/外殼: 49-WFBGA
供應(yīng)商設(shè)備封裝: 49-CSBGA(7x7)
包裝: 帶卷 (TR)
Product Brief AS3510
Rev. 1v2, June 2004
CONFIDENTIAL
Page 7 of 19
Power Amplifier
Block Description
The Power Amplifier Block converts the differential output
signals from the AudioDAC into single ended signals with
the drive capability for impedances
≥4 ohms.
With the conversion from differential to single ended, the
transformation of DC level from AGND (=AVDD/2) to BGND
(=BVDD/2) is done. The gain of this driver stage can be set
by 4 digital input signals in the range from –39dB to +3dB in
steps of 3dB. With the maximum gain of +3dB, full scale
gives 4.95Vpp at the single ended output.
With I2S data giving full-scale swing, clipping will occur with
the max. gain-step. With min. BVDD of 3.0V the same is
true for the two highest gain-steps.
When the control signals Gain(3:0) are all set to “L”, the
block is set to power-down.
There is a BGND generation, which needs an external
capacitor of 100nF for blocking of low frequency
components at BVDD. With this external capacitor, a so
called “Klickless On” is performed so that at power-up, the
output terminals have a smooth startup to avoid any
transient noise in the headphone.
Gain
(3:0)
Gain
dif
se
FS Swing
Gain
(3:0)
Gain
dif
se
FS
Swing
H
+3dB
4.95Vpp
L
H
-21dB
309mVpp
H
L
0dB
3.50Vpp
L
H
L
-24dB
219mVpp
H
L
H
-3dB
2.47Vpp
L
H
L
H
-27dB
155mVpp
H
L
-6dB
1.75Vpp
L
H
L
-30dB
109mVpp
H
L
H
-9dB
1.24Vpp
L
H
-33dB
77mVpp
H
L
H
L
-12dB
0.87Vpp
L
H
L
-36dB
55mVpp
H
L
H
-15dB
0.62Vpp
L
H
-39dB
39mVpp
H
L
LL
-18dB
0.44Vpp
L
LLL
OFF
-
Table 9
Table of Gain Steps
ams
AG
Technical
content
still
valid
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