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參數(shù)資料
| 型號： | AS2536 |
| 廠商： | ams |
| 文件頁數(shù)： | 20/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TELEPHONE CMOS MULTIFU 28SOIC |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 系列： | * |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當(dāng)前第20頁第21頁第22頁第23頁第24頁第25頁第26頁
Data She et AS25 33-36
austriamicrosystems
Revision 8.10
Page 2 of 25
Pin Description
Pin #
Symbol
Function
4
VDD
Positive Voltage Supply
This is the supply pin for the circuit.
5
AGND
Analog Ground
This is the analogue ground for the amplifiers.
6
STB
Side Tone Balance Input
This is the input for side tone cancellation.
7
CI
Complex Impedance Pin
For complex impedance a capacitor should be connected to
8
MO
Melody Output
PDM output of the melody generator for tone ringing with internal open-drain transistor.
Hi-Z when not active.
9
LLC
Line Loss Compensation
Select pin for line loss compensation (see also Figure 6 and Figure 7).
LLC = AGND : 20 - 50 mA LLC = VDD : 45 - 75 mA LLC = VSS : none.
10
HS/DP
Hook Switch Input and Dial Pulse Output
This is an I/O that is pulled high by the hook switch when off-hook and an open drain pulls it low
during break periods of pulse dialing and flash.
11
OSC
OSCillator Input
Pin for ceramic resonator (3.58 MHz).
Reference:
Murata CSTCC3M58GD3346-R0
SMD
Murata CSTLS3M58GD3458-B0
Lead
12
MODE
Signaling
MODE Select Input
Mode pin
Function
Open
Dialing inhibited
Row 1
LD mode, 10 pps, 33/66 ms
Row 2
LD mode, 10 pps, 40/60 ms
Row 3
LD mode, 20 pps, 33/66 ms
Row 4
LD mode, 20 pps, 40/60 ms
Row 5
LD mode, 10 pps, 33/66 ms, Temp. MF with tone on first * key entry
Row 61
MF only, 82/82 ms
Row 7
MF only, 82/160 ms
During temporary MF: 82/160 ms
13
14
15
16
C4
C3
C2
C1
Keyboard Columns
(see key arrangements in Figure 2, Figure 3 and Figure 4)
ams
AG
Technical
content
still
valid
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