參數(shù)資料
型號: APD-128G032
廠商: Vishay Intertechnology,Inc.
英文描述: Plasma Display Modules 128 x 32 Graphics Display with Drive Electronics and TTL Level Data Interface
中文描述: 等離子顯示模塊128 × 32圖形顯示驅(qū)動器電子和TTL電平數(shù)據(jù)接口
文件頁數(shù): 1/1頁
文件大?。?/td> 54K
代理商: APD-128G032
Document Number: 37006
Revision 16-Nov-00
www.vishay.com
2
APD-128G032
Vishay Dale
Plasma Display Modules
128 x 32 Graphics Display with
Drive Electronics and TTL Level Data Interface
FEATURES
TTL level video interface.
Large characters.
Highly visible for long distance viewing.
> 30:1 contrast ratio.
Bright and pleasant neon orange color.
Slim profile.
Very affordable.
ELECTRICAL SPECIFICATIONS
Voltage (s) Required:
+ 75 VDC, V
sp
. - 110 VDC, V
sn
.
+ 5 VDC, V
cc
. + 12 VDC (- 98 VDC), V
rw
.
(12 VDC to be referenced to - 110 VDC.)
Power Required:
Typical = 12 watts. Maximum = 45 watts.
OPTICAL SPECIFICATIONS
Viewing Area:
12.75" [323.8mm] W x 3.15" [80.01mm] L.
Character Array:
8 x 8: 16 x 4. 6 x 8: 21 x 4.
Character Size:
0.65" [16.51mm] H x 0.45" [11.43mm] W.
Pixel Size:
0.050" [1.27mm].
Pixel Pitch:
0.100" [2.54mm].
Luminance:
50 foot lamberts.
STANDARD ELECTRICAL SPECIFICATIONS*
DESCRIPTION
SYMBOL
MIN.
Logic Supply
V
cc
+ 4.5
Anode Supply
V
sp
Cathode Supply
V
sn
Cathode Control**
V
rw
+ 10.8
Total V
sp
and V
sn
V
tot
170
Logic 1 Input
V
ih
Logic 0 Input
V
il
The APD-128G032 DC plasma display offers viewing qualities designers seek such as high contrast, viewing angle of 150
°
minimum and long distance readability. Its bright (50 foot Lambert minimum) with characters and graphics figures presented in
a pleasing neon orange color against a black background. Plasma is much more readable and eye-pleasing than liquid crystal
or vacuum fluorescent displays and is filterable to red, amber or neutral density.
These plasma display panels are driven in a standard row-column refresh method much like a CRT display. The designer need
only supply TTL level signals for SERIAL DATA, DOT CLOCK, COLUMN LATCH, ROW DATA, ROW CLOCK and DISPLAY
ENABLE. The SERIAL DATA is entered with the DOT CLOCK up to frequencies as high as 8mHz. After a row of 128 pixels is
clocked in, the COLUMN LATCH signal is toggled and the data is latched. At the time the data is latched, the display is briefly
disabled using the DISPLAY ENABLE signal, then the row pointer is advanced with the ROW CLOCK signal. Once each frame
the ROW DATA must be asserted to synchronize the column serial data with the beginning row. The recommended scanning
frequency is approximately 70Hz, but may be as high as 200Hz. The high clock rate on the data clock allows for rapid refresh
and maximum access time to the refresh ram.
*Recommended operating voltages . All maximums are absolute
maximum.
**V
rw
is referenced to V
sn
.
DESCRIPTION
Display, Driver Electronics and TTL Interface ............................................................................................................................ APD-128G032
Data Connector Kit ............................................................................................................................................................................280105-05
Power Connector Kit..........................................................................................................................................................................280108-12
PART NUMBER
ORDERING INFORMATION
TYP.
+ 5.0
+ 75
- 110
+ 12.0
185
MAX.
+ 5.5
+ 80.0
- 125
+ 15.0
205
0.8
UNITS
VDC
VDC
VDC
VDC
VDC
VDC
VDC
2.0
DIMENSIONS
in inches [millimeters]
0.395
[10.033]
Pin #1
of P2
Pin #1
of P1
0.062
[1.575]
PCB
Thickness
7.4
[187.96]
14.5
[368.3]
Mounting
Holes
0.150 [3.81]
Dia.
6 Places
2.463
[62.56]
7.25
[184.15]
0.150
[3.81]
14.80
[375.92]
13.775
[349.88]
1.025
[26.035]
0.888
[22.56]
0.487
[12.37]
3.15
[80.01]
[4.075
4.625
[117.48]
4.925
[125.10]
0.150
[3.81]
12.75
[323.85]
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