ProASICPLUS Flash Family FPGAs 3- 54 v5.9 J3 I/O J4 I/O J5 I/O J6 I/O J7 NC J8 <" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� APA750-BG456
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 44/178闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA PROASIC+ 750K 456-PBGA
妯欐簴鍖呰锛� 24
绯诲垪锛� ProASICPLUS
RAM 浣嶇附瑷堬細 147456
杓稿叆/杓稿嚭鏁�(sh霉)锛� 356
闁€鏁�(sh霉)锛� 750000
闆绘簮闆诲锛� 2.3 V ~ 2.7 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 456-BBGA
渚涙噳鍟嗚ō鍌欏皝瑁濓細 456-PBGA锛�35x35锛�
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�鐣跺墠绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�绗�72闋�绗�73闋�绗�74闋�绗�75闋�绗�76闋�绗�77闋�绗�78闋�绗�79闋�绗�80闋�绗�81闋�绗�82闋�绗�83闋�绗�84闋�绗�85闋�绗�86闋�绗�87闋�绗�88闋�绗�89闋�绗�90闋�绗�91闋�绗�92闋�绗�93闋�绗�94闋�绗�95闋�绗�96闋�绗�97闋�绗�98闋�绗�99闋�绗�100闋�绗�101闋�绗�102闋�绗�103闋�绗�104闋�绗�105闋�绗�106闋�绗�107闋�绗�108闋�绗�109闋�绗�110闋�绗�111闋�绗�112闋�绗�113闋�绗�114闋�绗�115闋�绗�116闋�绗�117闋�绗�118闋�绗�119闋�绗�120闋�绗�121闋�绗�122闋�绗�123闋�绗�124闋�绗�125闋�绗�126闋�绗�127闋�绗�128闋�绗�129闋�绗�130闋�绗�131闋�绗�132闋�绗�133闋�绗�134闋�绗�135闋�绗�136闋�绗�137闋�绗�138闋�绗�139闋�绗�140闋�绗�141闋�绗�142闋�绗�143闋�绗�144闋�绗�145闋�绗�146闋�绗�147闋�绗�148闋�绗�149闋�绗�150闋�绗�151闋�绗�152闋�绗�153闋�绗�154闋�绗�155闋�绗�156闋�绗�157闋�绗�158闋�绗�159闋�绗�160闋�绗�161闋�绗�162闋�绗�163闋�绗�164闋�绗�165闋�绗�166闋�绗�167闋�绗�168闋�绗�169闋�绗�170闋�绗�171闋�绗�172闋�绗�173闋�绗�174闋�绗�175闋�绗�176闋�绗�177闋�绗�178闋�
ProASICPLUS Flash Family FPGAs
3- 54
v5.9
J3
I/O
J4
I/O
J5
I/O
J6
I/O
J7
NC
J8
VDDP
J9
VDD
J10
VDD
J11
VDD
J12
VDD
J13
VDD
J14
VDD
J15
VDD
J16
VDD
J17
VDD
J18
VDD
J19
VDDP
J20
NC
J21
I/O
J22
I/O
J23
I/O
J24
I/O
J25
I/O
J26
I/O
K1
I/O
K2
I/O
K3
I/O
K4
I/O
K5
I/O
K6
I/O
K7
I/O
K8
VDDP
K9
VDD
K10
GND
K11
GND
676-Pin FBGA
Pin
Number
APA600
Function
APA750
Function
K12
GND
K13
GND
K14
GND
K15
GND
K16
GND
K17
GND
K18
VDD
K19
VDDP
K20
I/O
K21
I/O
K22
I/O
K23
I/O
K24
I/O
K25
I/O
K26
I/O
L1
I/O
L2
I/O
L3
I/O
L4
I/O
L5
I/O
L6
I/O
L7
NC
L8
VDDP
L9
VDD
L10
GND
L11
GND
L12
GND
L13
GND
L14
GND
L15
GND
L16
GND
L17
GND
L18
VDD
L19
VDDP
L20
NC
676-Pin FBGA
Pin
Number
APA600
Function
APA750
Function
L21
I/O
L22
I/O
L23
I/O
L24
I/O
L25
I/O
L26
I/O
M1
I/O
M2
I/O
M3
I/O
M4
I/O
M5
I/O
M6
I/O
M7
I/O
M8
VDDP
M9
VDD
M10
GND
M11
GND
M12
GND
M13
GND
M14
GND
M15
GND
M16
GND
M17
GND
M18
VDD
M19
VDDP
M20
I/O
M21
I/O
M22
I/O
M23
I/O
M24
I/O
M25
I/O
M26
I/O
N1
I/O / GL1
N2
AGND
N3
I/O / GLMX1 I/O / GLMX1
676-Pin FBGA
Pin
Number
APA600
Function
APA750
Function
鐩搁棞PDF璩囨枡
PDF鎻忚堪
AMM22DTAT-S189 CONN EDGECARD 44POS R/A .156 SLD
EP2SGX30CF780C4N IC STRATIX II GX 30K 780-FBGA
EMM44DRAI CONN EDGECARD 88POS R/A .156 SLD
EP2AGX45DF29I5 IC ARRIA II GX FPGA 45K 780FBGA
EP2AGX45DF29C4 IC ARRIA II GX FPGA 45K 780FBGA
鐩搁棞浠g悊鍟�/鎶€琛撳弮鏁�(sh霉)
鍙冩暩(sh霉)鎻忚堪
APA750-BG456I 鍔熻兘鎻忚堪:IC FPGA PROASIC+ 750K 456-PBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ProASICPLUS 妯欐簴鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳鍟嗚ō鍌欏皝瑁�:352-CQFP锛�75x75锛�
APA750-BGB 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ProASIC Flash Family FPGAs
APA750-BGES 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:ProASIC Flash Family FPGAs
APA750-BGG456 鍔熻兘鎻忚堪:IC FPGA PROASIC+ 750K 456-PBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ProASICPLUS 妯欐簴鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳鍟嗚ō鍌欏皝瑁�:352-CQFP锛�75x75锛�
APA750-BGG456I 鍔熻兘鎻忚堪:IC FPGA PROASIC+ 750K 456-PBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:ProASICPLUS 妯欐簴鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳鍟嗚ō鍌欏皝瑁�:352-CQFP锛�75x75锛�